A QEMU 6.1 release has been announced. As an emulator, QEMU allows running programs compiled for one hardware platform on a system with an entirely different architecture, for example, executing an ARM application on an x86-compatible PC. In virtualization mode, the performance of code execution in an isolated environment is close to that of a physical system due to direct execution of instructions on the CPU and the use of the Xen hypervisor or KVM module. <\/p>\n
Initially, the project was created by Fabrice Bellard to enable the execution of Linux executable files compiled for the x86 platform on architectures different from x86. Over the years of development, support has been added for full emulation of 14 hardware architectures, exceeding 400 emulated hardware devices. More than 3,000 changes have been made from 221 developers in preparing version 6.1. <\/p>\n
Key improvements added in QEMU 6.1: <\/p>\n
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A QMP (QEMU Machine Protocol) parancsot adtunk a m\u00e1r l\u00e9trehozott blokk k\u00e9sz\u00fcl\u00e9kek be\u00e1ll\u00edt\u00e1sainak megv\u00e1ltoztat\u00e1s\u00e1ra, a «blockdev-reopen» parancs seg\u00edts\u00e9g\u00e9vel.\n
The gnutls driver has been made the preferred cryptographic driver, outperforming other drivers in performance. The previously default libgcrypt-based driver has been moved to options, while the nettle-based driver remains a fallback option used in the absence of GnuTLS and Libgcrypt.\n
Support for PMBus and I2C multiplexers (pca9546, pca9548) has been added to the I2C emulator.\n
By default, support for plugins to the classic TCG (Tiny Code Generator) has been enabled. New plugins execlog (execution log) and cache modelling (simulating L1 cache behavior in the CPU) have been added.\n
Support for boards based on Aspeed chips (rainier-bmc, quanta-q7l1), npcm7xx (quanta-gbs-bmc), and Cortex-M3 (stm32vldiscovery) has been added to the ARM emulator. Support for hardware encryption and hashing engines provided in Aspeed chips has been integrated. Emulation support for SVE2 instructions (including bfloat16), matrix multiplication operators, and commands to reset translation lookaside buffers (TLB) has been added.\n
A PowerPC architekt\u00far\u00e1j\u00fa emul\u00e1torban a «pseries» emul\u00e1lt g\u00e9pek sz\u00e1m\u00e1ra t\u00e1mogat\u00e1st adtunk a k\u00e9sz\u00fcl\u00e9kek forr\u00f3 csatlakoztat\u00e1s\u00e1n\u00e1l fell\u00e9p\u0151 hib\u00e1k detekt\u00e1l\u00e1s\u00e1ra az \u00faj vend\u00e9gk\u00f6rnyezetekben, megn\u00f6velt\u00fck a CPU-k sz\u00e1m\u00e1nak korl\u00e1tj\u00e1t, \u00e9s megval\u00f3s\u00edtottuk egyes POWER10 processzorokra jellemz\u0151 utas\u00edt\u00e1sok emul\u00e1l\u00e1s\u00e1t. T\u00e1mogat\u00e1st adtunk a Genesi\/bPlan Pegasos II (pegasos2) chip alap\u00fa k\u00e1rty\u00e1khoz.\n
The RISC-V emulator now supports the OpenTitan platform and the virtual GPU virtio-vga (based on virgl).\n
The s390 emulator has added support for the 16th generation CPU and vector extensions.\n
The x86 emulator has added support for new Intel CPU models (Skylake-Client-v4, Skylake-Server-v5, Cascadelake-Server-v5, Cooperlake-v2, Icelake-Client-v3, Icelake-Server-v5, Denverton-v3, Snowridge-v3, Dhyana-v2), which implement the XSAVES instruction. The Q35 chipset (ICH9) emulator has implemented support for hot-plugging PCI devices. Emulation of the virtualization extensions offered by AMD processors has been improved. The bus-lock-ratelimit option has been added to limit the intensity of bus locking by the guest system.\n
Support has been added for using NVMM, developed by the NetBSD project, as an accelerator for the hypervisor.\n
In the GUI, password authentication using the VNC protocol is now enabled only when built with an external cryptographic backend (gnutls, libgcrypt, or nettle). <\/ul>\n