{"id":111428,"date":"2023-11-11T03:10:14","date_gmt":"2023-11-11T01:10:14","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/dostupen-vortex-2-0-otkrytyj-gpgpu-na-baze-arhitektury-risc-v"},"modified":"2023-11-11T03:10:14","modified_gmt":"2023-11-11T01:10:14","slug":"dostupen-vortex-2-0-otkrytyj-gpgpu-na-baze-arhitektury-risc-v","status":"publish","type":"post","link":"https:\/\/prohoster.info\/hu\/blog\/news\/dostupen-vortex-2-0-otkrytyj-gpgpu-na-baze-arhitektury-risc-v","title":{"rendered":"El\u00e9rhet\u0151 a Vortex 2.0, ny\u00edlt GPGPU RISC-V architekt\u00far\u00e1ra alapozva","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Megjelent a Vortex projekt m\u00e1sodik kiad\u00e1sa, amely egy ny\u00edlt GPGPU-t fejleszt az RISC-V utas\u00edt\u00e1sk\u00e9szlet architekt\u00far\u00e1j\u00e1ra \u00e9p\u00edtve, p\u00e1rhuzamos sz\u00e1m\u00edt\u00e1sok v\u00e9grehajt\u00e1s\u00e1ra az OpenCL API \u00e9s a SIMT (Single Instruction, Multiple Threads) v\u00e9grehajt\u00e1si modell felhaszn\u00e1l\u00e1s\u00e1val. A projekt a 3D grafika kutat\u00e1s\u00e1ban \u00e9s \u00faj GPU architekt\u00far\u00e1k fejleszt\u00e9s\u00e9ben is felhaszn\u00e1lhat\u00f3. A Verilog nyelven k\u00e9sz\u00fclt hardverblokkok le\u00edr\u00e1sai, szimul\u00e1tor, illeszt\u0151programok \u00e9s egy\u00e9b projekt-dokument\u00e1ci\u00f3 az Apache 2.0 licenc alatt v\u00e1lik el\u00e9rhet\u0151v\u00e9.     <\/p>\n<p>A GPGPU alapj\u00e1t a tipikus RISC-V ISA k\u00e9pezi, amelyet kieg\u00e9sz\u00edt\u0151 utas\u00edt\u00e1sokkal b\u0151v\u00edtettek, hogy t\u00e1mogassa a GPU funkci\u00f3it \u00e9s a sz\u00e1lkezel\u00e9st. A RISC-V utas\u00edt\u00e1sk\u00e9szlet architekt\u00far\u00e1j\u00e1ban a v\u00e1ltoztat\u00e1sok minimaliz\u00e1lva lettek, \u00e9s ahol lehets\u00e9ges, a m\u00e1r megl\u00e9v\u0151 vektori\u00e1lis utas\u00edt\u00e1sokat haszn\u00e1lj\u00e1k. Hasonl\u00f3 megk\u00f6zel\u00edt\u00e9st alkalmaz a RV64X projekt, amely szint\u00e9n ny\u00edlt GPU-t fejleszt RISC-V technol\u00f3gi\u00e1kra alapozva.    <\/p>\n<p><center><img decoding=\"async\" alt=\"El\u00e9rhet\u0151 a Vortex 2.0, ny\u00edlt GPGPU RISC-V architekt\u00far\u00e1ra alapozva\" src=\"\/wp-content\/uploads\/2023\/11\/200fcfdbad5e085ae5e1b154b75b1210.png\" style=\"display:block;margin: 0 auto;\" \/><\/center>      <\/p>\n<p>A Vortex technol\u00f3gi\u00e1j\u00e1n alapul\u00f3 grafikai GPU Skybox ny\u00edlt fejleszt\u00e9se zajlik, amely t\u00e1mogatja a Vulkan grafikai API-t. A Skybox protot\u00edpus, amely az Altera Stratix 10 FPGA-ra \u00e9p\u00fclt \u00e9s 32 magot (512 sz\u00e1lat) tartalmaz, 230 MHz-es \u00f3rajelen 3,7 gigapixelt m\u00e1sodpercenk\u00e9nt (29,4 gigatranzakci\u00f3t m\u00e1sodpercenk\u00e9nt) tudott el\u00e9rni. \u00c9rdemes megjegyezni, hogy ez az els\u0151 olyan ny\u00edlt GPU, amely szoftveres \u00e9s hardveres megval\u00f3s\u00edt\u00e1ssal rendelkezik, \u00e9s t\u00e1mogatja a Vulkant.             <\/p>\n<p>A Vortex f\u0151bb jellemz\u0151i:  <\/p>\n<ul>\n<li class=\"l\"> T\u00e1mogatja a 32 \u00e9s 64 bites RISC-V RV32IMF \u00e9s RV64IMAFD utas\u00edt\u00e1sk\u00e9szleteket.  <\/li>\n<li class=\"l\"> Szab\u00e1lyozhat\u00f3 sz\u00e1m\u00fa mag, feladatblokkok (warps) \u00e9s sz\u00e1lak.\n<li class=\"l\"> Szab\u00e1lyozhat\u00f3 ALU, FPU, LSU \u00e9s SFU sz\u00e1m minden mag sz\u00e1m\u00e1ra.\n<li class=\"l\"> Szab\u00e1lyozhat\u00f3 pipeline v\u00e9grehajt\u00e1si sz\u00e9less\u00e9g.\n<li class=\"l\"> Opcion\u00e1lis megosztott mem\u00f3ria \u00e9s L1, L2 \u00e9s L3 cache-ek.\n<li class=\"l\"> T\u00e1mogatja az OpenCL 1.2 specifik\u00e1ci\u00f3t.\n<li class=\"l\"> Lehet\u0151s\u00e9g FPGA Altera Arria 10, Altera Stratix 10, Xilinx Alveo U50, U250, U280 \u00e9s Xilinx Versal VCK5000 alap\u00fa megval\u00f3s\u00edt\u00e1sra.\n<li class=\"l\"> Kiterjesztett utas\u00edt\u00e1sok: &#171;tex&#187; a text\u00far\u00e1k feldolgoz\u00e1s\u00e1nak felgyors\u00edt\u00e1s\u00e1ra, vx_rast a raszterez\u00e9s kezel\u00e9s\u00e9re, vx_rop a fragmentumok, m\u00e9lys\u00e9gek \u00e9s \u00e1tl\u00e1tsz\u00f3s\u00e1g feldolgoz\u00e1s\u00e1ra, vx_imadd a &#171;szorozni \u00e9s \u00f6sszeadni&#187; m\u0171velet v\u00e9grehajt\u00e1s\u00e1ra,  vx_wspawn, vx_tmc \u00e9s vx_bar az utas\u00edt\u00e1sfronok \u00e9s benn\u00fck l\u00e9v\u0151 sz\u00e1lak aktiv\u00e1l\u00e1s\u00e1ra (wavefront, sz\u00e1lcsoport, p\u00e1rhuzamosan v\u00e9grehajtott SIMD Engine), vx_split \u00e9s vx_join.\n<li class=\"l\"> A SPIR-V shaderek k\u00f6ztes reprezent\u00e1ci\u00f3j\u00e1nak t\u00e1mogat\u00e1sa OpenCL-be t\u00f6rt\u00e9n\u0151 ford\u00edt\u00e1ssal val\u00f3sul meg.\n<li class=\"l\"> Alkalmaz\u00e1sfejleszt\u00e9shez eszk\u00f6zk\u00e9szlet \u00e1ll rendelkez\u00e9sre, amely a Vortexhez illeszked\u0151 PoCL (OpenCL ford\u00edt\u00f3 \u00e9s runtime), LLVM\/Clang, GCC \u00e9s Binutils adapt\u00e1lt v\u00e1ltozatait tartalmazza.\n<li class=\"l\"> A chip m\u0171k\u00f6d\u00e9s\u00e9nek szimul\u00e1l\u00e1sa Verilator (Verilog szimul\u00e1tor), RTLSIM (RTL szimul\u00e1ci\u00f3) \u00e9s SimX (szoftveres szimul\u00e1ci\u00f3) felhaszn\u00e1l\u00e1s\u00e1val t\u00e1mogatott.        <\/ul>\n<p>A Vortex 2.0 verzi\u00f3ban bevezetett v\u00e1ltoz\u00e1sok k\u00f6z\u00f6tt szerepel:  <\/p>\n<ul>\n<li class=\"l\"> Mikroarchitekt\u00fara optimaliz\u00e1l\u00e1s t\u00f6rt\u00e9nt.\n<li class=\"l\"> 64-bites RISC-V RV64IMAFD utas\u00edt\u00e1sk\u00e9szlet architekt\u00fara t\u00e1mogat\u00e1sa.\n<li class=\"l\"> Xilinx FPGA alap\u00fa megval\u00f3s\u00edt\u00e1s lehet\u0151s\u00e9ge.\n<li class=\"l\"> LLVM 16 \u00e9s Ubuntu 20.04 t\u00e1mogat\u00e1sa.\n<li class=\"l\"> Refaktor\u00e1l\u00e1s t\u00f6rt\u00e9nt, \u00e9s jav\u00edt\u00e1sok ker\u00fcltek bevezet\u00e9sre a min\u0151s\u00e9g\u00e9rt\u00e9kel\u00e9s sor\u00e1n felmer\u00fclt hi\u00e1nyoss\u00e1gok kijav\u00edt\u00e1sa \u00e9rdek\u00e9ben.  <\/ul>\n<p>Forr\u00e1s: <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=60088\">opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u041e\u043f\u0443\u0431\u043b\u0438\u043a\u043e\u0432\u0430\u043d\u0430 \u0432\u0442\u043e\u0440\u0430\u044f \u0440\u0435\u0434\u0430\u043a\u0446\u0438\u044f \u043f\u0440\u043e\u0435\u043a\u0442\u0430 Vortex, \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u044e\u0449\u0435\u0433\u043e \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u0439 GPGPU \u043d\u0430 \u0431\u0430\u0437\u0435 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u044b \u043d\u0430\u0431\u043e\u0440\u0430 \u043a\u043e\u043c\u0430\u043d\u0434 RISC-V, \u0440\u0430\u0441\u0441\u0447\u0438\u0442\u0430\u043d\u043d\u044b\u0439 \u043d\u0430 \u0432\u044b\u043f\u043e\u043b\u043d\u0435\u043d\u0438\u0435 \u043f\u0430\u0440\u0430\u043b\u043b\u0435\u043b\u044c\u043d\u044b\u0445 \u0432\u044b\u0447\u0438\u0441\u043b\u0435\u043d\u0438\u0439 \u0441 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u0435\u043c API OpenCL \u0438 \u043c\u043e\u0434\u0435\u043b\u0438 \u0432\u044b\u043f\u043e\u043b\u043d\u0435\u043d\u0438\u044f SIMT (Single Instruction, Multiple Threads). \u041f\u0440\u043e\u0435\u043a\u0442\u0430 \u0442\u0430\u043a\u0436\u0435 \u043c\u043e\u0436\u0435\u0442 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c\u0441\u044f \u043f\u0440\u0438 \u043f\u0440\u043e\u0432\u0435\u0434\u0435\u043d\u0438\u0438 \u0438\u0441\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u043d\u0438\u0439 \u0432 \u043e\u0431\u043b\u0430\u0441\u0442\u0438 3D-\u0433\u0440\u0430\u0444\u0438\u043a\u0438 \u0438 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u043a\u0438 \u043d\u043e\u0432\u044b\u0445 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440 GPU. \u0421\u0445\u0435\u043c\u044b, \u043e\u043f\u0438\u0441\u0430\u043d\u0438\u044f \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u044b\u0445 \u0431\u043b\u043e\u043a\u043e\u0432 \u043d\u0430 \u044f\u0437\u044b\u043a\u0435 Verilog, \u0441\u0438\u043c\u0443\u043b\u044f\u0442\u043e\u0440, \u0434\u0440\u0430\u0439\u0432\u0435\u0440\u044b [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":111429,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-111428","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.3 - aioseo.com -->\n\t<meta name=\"description\" content=\"\u041e\u043f\u0443\u0431\u043b\u0438\u043a\u043e\u0432\u0430\u043d\u0430 \u0432\u0442\u043e\u0440\u0430\u044f \u0440\u0435\u0434\u0430\u043a\u0446\u0438\u044f \u043f\u0440\u043e\u0435\u043a\u0442\u0430 Vortex, \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u044e\u0449\u0435\u0433\u043e \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u0439 GPGPU \u043d\u0430 \u0431\u0430\u0437\u0435 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u044b 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utas\u00edt\u00e1sk\u00e9szlet architekt\u00far\u00e1j\u00e1ra \u00e9p\u00edtve, p\u00e1rhuzamos sz\u00e1m\u00edt\u00e1sok v\u00e9grehajt\u00e1s\u00e1ra az OpenCL API \u00e9s a v\u00e9grehajt\u00e1si modell felhaszn\u00e1l\u00e1s\u00e1val.","canonical_url":"https:\/\/prohoster.info\/hu\/blog\/news\/dostupen-vortex-2-0-otkrytyj-gpgpu-na-baze-arhitektury-risc-v","robots":"max-image-preview:large","keywords":"","webmasterTools":{"miscellaneous":""},"schema":null,"og:locale":"hu_HU","og:site_name":"ProHoster | \u041a\u0443\u043f\u0438\u0442\u044c \u043d\u0430\u0434\u0435\u0436\u043d\u044b\u0439 \u0445\u043e\u0441\u0442\u0438\u043d\u0433 \u0434\u043b\u044f \u0441\u0430\u0439\u0442\u043e\u0432 \u0441 \u0437\u0430\u0449\u0438\u0442\u043e\u0439 \u043e\u0442 DDoS, VPS VDS \u0441\u0435\u0440\u0432\u0435\u0440\u044b","og:type":"article","og:title":"\ud83e\udd47\u0414\u043e\u0441\u0442\u0443\u043f\u0435\u043d Vortex 2.0, \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u0439 GPGPU \u043d\u0430 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