{"id":116280,"date":"2024-06-02T15:40:23","date_gmt":"2024-06-02T13:40:23","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/novaya-optimizacziya-funkczii-memset-v-glibc"},"modified":"2024-06-02T15:40:23","modified_gmt":"2024-06-02T13:40:23","slug":"novaya-optimizacziya-funkczii-memset-v-glibc","status":"publish","type":"post","link":"https:\/\/prohoster.info\/hu\/blog\/news\/novaya-optimizacziya-funkczii-memset-v-glibc","title":{"rendered":"\u00daj optimaliz\u00e1l\u00e1s a memset() funkci\u00f3hoz a glibc-ben","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
Az Intel m\u00e9rn\u00f6ke, Noah Goldstein, optimaliz\u00e1lta a memset() f\u00fcggv\u00e9nyt a glibc k\u00f6nyvt\u00e1rban. Ez az optimaliz\u00e1l\u00e1s k\u00f6r\u00fclbel\u00fcl 7,5%-os teljes\u00edtm\u00e9nyn\u00f6veked\u00e9st biztos\u00edt a Skylake-X \u00e9s Ice Lake architekt\u00far\u00e1j\u00fa asztali processzorok eset\u00e9ben. A szerververzi\u00f3k eset\u00e9ben a teljes\u00edtm\u00e9nyn\u00f6veked\u00e9s valamivel alacsonyabb, f\u0151k\u00e9nt az egyes magok \u00f6sszteljes\u00edtm\u00e9ny\u00e9nek alacsony volta miatt.<\/p>\n
A memset() f\u00fcggv\u00e9ny kor\u00e1bbi megval\u00f3s\u00edt\u00e1s\u00e1ban az rep stosb assembler utas\u00edt\u00e1st haszn\u00e1lt\u00e1k. Eddig ez az utas\u00edt\u00e1s el\u00e9g gyorsan m\u0171k\u00f6d\u00f6tt, a processzoron bel\u00fcli zero-over-zero writeback optimaliz\u00e1ci\u00f3 r\u00e9v\u00e9n. Azonban ebben az optimaliz\u00e1ci\u00f3ban potenci\u00e1lis sebezhet\u0151s\u00e9get fedeztek fel, amely oldals\u00f3 csatorn\u00e1s t\u00e1mad\u00e1sra vezethetett. Ennek k\u00f6vetkezt\u00e9ben a zero-over-zero writeback optimaliz\u00e1l\u00e1s megsz\u0171nt, ami a rep stosb teljes\u00edtm\u00e9ny\u00e9nek cs\u00f6kken\u00e9s\u00e9t eredm\u00e9nyezte. Az \u00faj memset() verzi\u00f3ban az rep stosb utas\u00edt\u00e1st tov\u00e1bbra is haszn\u00e1lj\u00e1k, de szigor\u00fabb felt\u00e9telek mellett.<\/p>\n
Hogy pontosan mi v\u00e1ltozott, azt a k\u00f6vetkez\u0151 komment\u00e1r k\u00f3dv\u00e1ltoz\u00e1s\u00e1b\u00f3l \u00e9rthetj\u00fck meg, amely a memset() megval\u00f3s\u00edt\u00e1s\u00e1nak r\u00e9szleteit \u00edrja le.<\/p>\n
A kor\u00e1bbi verzi\u00f3 le\u00edr\u00e1sa:<\/p>\n
\/* memset is implemented as: 1. Use overlapping store to avoid branch. 2. If size is less than VEC, use integer register stores. 3. If size is from VEC_SIZE to 2 * VEC_SIZE, use 2 VEC stores. 4. If size is from 2 * VEC_SIZE to 4 * VEC_SIZE, use 4 VEC stores. 5. On machines ERMS feature, if size is greater or equal than __x86_rep_stosb_threshold then REP STOSB will be used. 6. If size is more to 4 * VEC_SIZE, align to 4 * VEC_SIZE with 4 VEC stores and store 4 * VEC at a time until done. *\/ <\/p>\n
Az \u00faj verzi\u00f3 le\u00edr\u00e1sa:<\/p>\n
\/* memset is implemented as: 1. Use overlapping store to avoid branch. 2. If size is less than VEC, use integer register stores. 3. If size is from VEC_SIZE to 2 * VEC_SIZE, use 2 VEC stores. 4. If size is from 2 * VEC_SIZE to 4 * VEC_SIZE, use 4 VEC stores. 5. If size is more to 4 * VEC_SIZE, align to 1 * VEC_SIZE with 4 VEC stores and store 4 * VEC at a time until done. 6. On machines ERMS feature, if size is range \t [__x86_rep_stosb_threshold, __x86_memset_non_temporal_threshold) \t then REP STOSB will be used. 7. If size >= __x86_memset_non_temporal_threshold, use a \t non-temporal stores. *\/<\/p>\n