{"id":138893,"date":"2025-07-09T23:11:55","date_gmt":"2025-07-09T21:11:55","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/ataka-tsa-privodyashhaya-k-utechke-informaczii-iz-mikroarhitekturnyh-struktur-cpu-amd"},"modified":"2025-07-09T23:11:55","modified_gmt":"2025-07-09T21:11:55","slug":"ataka-tsa-privodyashhaya-k-utechke-informaczii-iz-mikroarhitekturnyh-struktur-cpu-amd","status":"publish","type":"post","link":"https:\/\/prohoster.info\/hu\/blog\/news\/ataka-tsa-privodyashhaya-k-utechke-informaczii-iz-mikroarhitekturnyh-struktur-cpu-amd","title":{"rendered":"A TSA t\u00e1mad\u00e1sa, amely az AMD CPU mikroarchitektur\u00e1lis szerkezeteib\u0151l t\u00f6rt\u00e9n\u0151 adatsziv\u00e1rg\u00e1shoz vezetett","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Az AMD bejelentette egy \u00faj mikroarchitekt\u00far\u00e1kkal kapcsolatos t\u00e1mad\u00e1si oszt\u00e1lyt a processzorai sz\u00e1m\u00e1ra \u2014 TSA (Transient Scheduler Attack). Ez a t\u00e1mad\u00e1s lehet\u0151v\u00e9 teszi a t\u00e1mad\u00f3 sz\u00e1m\u00e1ra, hogy megker\u00fclje a CPU szigetel\u00e9si mechanizmusait, \u00e9s meg\u00e1llap\u00edtsa a m\u00e1s kontextusokban feldolgozott adatokat, p\u00e9ld\u00e1ul felhaszn\u00e1l\u00f3i t\u00e9rb\u0151l inform\u00e1ci\u00f3t der\u00edtsetek ki, ami a kernel szinten dolgozik, vagy egy virtu\u00e1lis g\u00e9pb\u0151l megtudni azokat az adatokat, amelyeket egy m\u00e1sik virtu\u00e1lis g\u00e9p haszn\u00e1l.       <\/p>\n<p>A sebezhet\u0151s\u00e9geket a Microsoft \u00e9s a Z\u00fcrichi M\u0171szaki Egyetem kutat\u00f3i \u00e1ltal kifejlesztett eszk\u00f6zprotot\u00edpus l\u00e9trehoz\u00e1sa sor\u00e1n t\u00e1rt\u00e1k fel, amely a mikroarchitekt\u00far\u00e1k k\u00f6z\u00f6tt l\u00e9v\u0151 k\u00fcl\u00f6nb\u00f6z\u0151 hozz\u00e1f\u00e9r\u00e9si z\u00f3n\u00e1k, p\u00e9ld\u00e1ul a kernel, virtu\u00e1lis g\u00e9pek \u00e9s folyamatok k\u00f6z\u00f6tti izol\u00e1ci\u00f3 stressztesztel\u00e9s\u00e9re szolg\u00e1l.        <\/p>\n<p>A t\u00e1mad\u00e1si m\u00f3dszer a mikroarchitektur\u00e1lis strukt\u00far\u00e1k \u00e1llapot\u00e1t\u00f3l f\u00fcgg\u0151 bizonyos utas\u00edt\u00e1sok v\u00e9grehajt\u00e1si idej\u00e9nek a f\u00fcgg\u0151s\u00e9g\u00e9n alapul. Amikor a processzor gyors befejez\u00e9st v\u00e1r el egy memoriaadatok olvas\u00e1s\u00e1ra vonatkoz\u00f3 utas\u00edt\u00e1s miatt (p\u00e9ld\u00e1ul felt\u00e9telezve, hogy az adatok az L1 cache-ben tal\u00e1lhat\u00f3k), de az adatok sikeresen t\u00f6rt\u00e9n\u0151 beszerz\u00e9se nem val\u00f3sul meg, akkor \"hamis befejez\u00e9s\" \u00e1llapotot (false completion) okoz. Ekkor a processzor, miel\u0151tt ezt az \u00e1llapotot meghat\u00e1rozn\u00e1, m\u00e1r \u00fctemezheti m\u00e1s, a mem\u00f3ria bet\u00f6lt\u00e9s utas\u00edt\u00f3 v\u00e9grehajt\u00e1s\u00e1nak az eredm\u00e9ny\u00e9t\u0151l f\u00fcgg\u0151 spekulat\u00edv v\u00e9grehajt\u00e1si m\u0171veleteket.      <\/p>\n<p>Mivel a bet\u00f6lt\u00e9s nem fejez\u0151d\u00f6tt be, az ahhoz kapcsol\u00f3d\u00f3 adatokat a processzor \u00e9rv\u00e9nytelennek tekinti, \u00e9s a bet\u00f6lt\u00e9si m\u0171veletet k\u00e9s\u0151bb \u00fajb\u00f3l megpr\u00f3b\u00e1lj\u00e1k v\u00e9grehajtani. A f\u00fcgg\u0151 m\u0171veleteket is \u00fajb\u00f3l v\u00e9grehajtj\u00e1k a helyes adatok k\u00e9szenl\u00e9t\u00e9nek f\u00fcggv\u00e9ny\u00e9ben. Ek\u00f6zben a feldolgoz\u00f3cs\u0151 (pipeline flush) nem t\u00f6rt\u00e9nik meg az utas\u00edt\u00e1s v\u00e9grehajt\u00e1sa ut\u00e1n, amelyhez \u0096hamis befejez\u00e9s\u00ac \u00e1llapotot r\u00f6gz\u00edtettek, \u00e9s a helytelen adatok \u00e1tir\u00e1ny\u00edthat\u00f3k a f\u00fcgg\u0151 m\u0171veletekhez.     <\/p>\n<p>Az ilyen m\u0171veletek v\u00e9grehajt\u00e1sa nem v\u00e1ltoztatja meg a cache \u00e9s a TLB (Translation Lookaside Buffer) \u00e1llapot\u00e1t, azaz az adatokat nem lehet hagyom\u00e1nyos m\u00f3dszerekkel vissza\u00e1ll\u00edtani a cache \u00e1llapot\u00e1nak meghat\u00e1roz\u00e1s\u00e1ra. De ezek az adatok hat\u00e1ssal vannak m\u00e1s utas\u00edt\u00e1sok v\u00e9grehajt\u00e1si idej\u00e9re. Az id\u0151z\u00edt\u00e9sek elemz\u00e9se inform\u00e1ci\u00f3sziv\u00e1rg\u00e1sk\u00e9nt haszn\u00e1lhat\u00f3 a mikroarchitekt\u00far\u00e1kb\u00f3l, amelyek megmaradnak m\u00e1s m\u0171veletek spekulat\u00edv v\u00e9grehajt\u00e1sa ut\u00e1n.       <\/p>\n<p>A marad\u00e9k adatok kinyer\u00e9s\u00e9nek forr\u00e1s\u00e1t\u00f3l f\u00fcgg\u0151en k\u00e9t sebezhet\u0151s\u00e9get emeltek ki:   <\/p>\n<ul>\n<li class=\"l\"> CVE-2024-36350 (TSA-SQ \u2014 TSA Store Queue) \u2014 \u00edr\u00e1si m\u0171veletek ideiglenes t\u00e1rol\u00f3j\u00e1b\u00f3l (Store Queue) sz\u00e1rmaz\u00f3 sziv\u00e1rg\u00e1s, amely lehet\u0151v\u00e9 teszi a mem\u00f3ria\u00edr\u00e1s utas\u00edt\u00e1sok eredm\u00e9ny\u00e9nek meghat\u00e1roz\u00e1s\u00e1t.\n<li class=\"l\"> CVE-2024-36357 (TSA-L1 \u2014 TSA L1 Data Cache) \u2014 sziv\u00e1rg\u00e1s az L1D cache-en kereszt\u00fcl.    <\/ul>\n<p>The vulnerabilities manifest in the AMD processor family (Fam19h) based on Zen 3 and Zen 4 microarchitectures. For instance, the issue is present in AMD Ryzen 5000\/6000\/7000\/8000 series CPUs, AMD EPYC Milan\/Milan-X\/Genoa\/Genoa-X\/Bergamo\/Siena, AMD Instinct MI300A, AMD Ryzen Threadripper PRO 7000 WX, AMD EPYC Embedded 7003\/8004\/9004\/97X4, and AMD Ryzen Embedded 5000\/7000\/V3000.     <\/p>\n<p>Az eddig sz\u00fcks\u00e9ges v\u00e1ltoztat\u00e1sok a sebezhet\u0151s\u00e9g blokkol\u00e1s\u00e1hoz a decemberi mikrok\u00f3d friss\u00edt\u00e9s \u00e9s az OEM gy\u00e1rt\u00f3knak \u00e1tadott PI firmware r\u00e9szek\u00e9nt tal\u00e1lhat\u00f3k. A sebezhet\u0151s\u00e9gt\u0151l val\u00f3 v\u00e9delemhez sz\u00fcks\u00e9ges patch-ek \u00e1tad\u00e1sra ker\u00fcltek a Linux kernel csomagj\u00e1hoz (a teljes\u00edtm\u00e9nyre negat\u00edv hat\u00e1ssal l\u00e9v\u0151 v\u00e9delem kikapcsol\u00e1s\u00e1ra a kernel parancssor\u00e1ban a \u0096tsa=off\u00ac lehet\u0151s\u00e9g szerepel). A jav\u00edt\u00e1s szint\u00e9n hozz\u00e1ad\u00e1sra ker\u00fclt a Xen hypervisorhoz. A sebezhet\u0151s\u00e9g blokkol\u00e1s\u00e1hoz egyar\u00e1nt sz\u00fcks\u00e9ges a mikrok\u00f3d friss\u00edt\u00e9s \u00e9s a kernel vagy hypervisor szintv\u00e9delmi m\u00f3d aktiv\u00e1l\u00e1sa.<br \/>\n<br \/>Forr\u00e1s: <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=63557\">opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u041a\u043e\u043c\u043f\u0430\u043d\u0438\u044f AMD \u0440\u0430\u0441\u043a\u0440\u044b\u043b\u0430 \u0438\u043d\u0444\u043e\u0440\u043c\u0430\u0446\u0438\u044e \u043d\u043e\u0432\u043e\u043c \u043a\u043b\u0430\u0441\u0441\u0435 \u043c\u0438\u043a\u0440\u043e\u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u043d\u044b\u0445 \u0430\u0442\u0430\u043a \u043d\u0430 \u0441\u0432\u043e\u0438 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u044b &#8212; TSA (Transient Scheduler Attack). \u0410\u0442\u0430\u043a\u0430 \u043f\u043e\u0437\u0432\u043e\u043b\u044f\u0435\u0442 \u0437\u043b\u043e\u0443\u043c\u044b\u0448\u043b\u0435\u043d\u043d\u0438\u043a\u0443 \u043e\u0431\u043e\u0439\u0442\u0438 \u043c\u0435\u0445\u0430\u043d\u0438\u0437\u043c\u044b \u0438\u0437\u043e\u043b\u044f\u0446\u0438\u0438 CPU \u0438 \u043e\u043f\u0440\u0435\u0434\u0435\u043b\u0438\u0442\u044c \u0434\u0430\u043d\u043d\u044b\u0435, \u043e\u0431\u0440\u0430\u0431\u0430\u0442\u044b\u0432\u0430\u0435\u043c\u044b\u0435 \u0432 \u0434\u0440\u0443\u0433\u0438\u0445 \u043a\u043e\u043d\u0442\u0435\u043a\u0441\u0442\u0430\u0445, \u043d\u0430\u043f\u0440\u0438\u043c\u0435\u0440, \u0438\u0437 \u043f\u0440\u043e\u0441\u0442\u0440\u0430\u043d\u0441\u0442\u0432\u0430 \u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u0435\u043b\u044f \u043e\u043f\u0440\u0435\u0434\u0435\u043b\u0438\u0442\u044c \u0438\u043d\u0444\u043e\u0440\u043c\u0430\u0446\u0438\u044e, \u043e\u0431\u0440\u0430\u0431\u0430\u0442\u044b\u0432\u0430\u0435\u043c\u0443\u044e \u043d\u0430 \u0443\u0440\u043e\u0432\u043d\u0435 \u044f\u0434\u0440\u0430, \u0438\u043b\u0438 \u0438\u0437 \u0433\u043e\u0441\u0442\u0435\u0432\u043e\u0439 \u0441\u0438\u0441\u0442\u0435\u043c\u044b \u0443\u0437\u043d\u0430\u0442\u044c \u0434\u0430\u043d\u043d\u044b\u0435, \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u0435\u043c\u044b\u0435 \u0432 \u0434\u0440\u0443\u0433\u043e\u0439 \u0433\u043e\u0441\u0442\u0435\u0432\u043e\u0439 \u0441\u0438\u0441\u0442\u0435\u043c\u0435. \u0423\u044f\u0437\u0432\u0438\u043c\u043e\u0441\u0442\u0438 \u0432\u044b\u044f\u0432\u043b\u0435\u043d\u044b \u0432 \u0445\u043e\u0434\u0435 [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-138893","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.3 - 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TSA (Transient Scheduler Attack).\" \/>\n\t\t<meta property=\"og:url\" content=\"https:\/\/prohoster.info\/hu\/blog\/news\/ataka-tsa-privodyashhaya-k-utechke-informaczii-iz-mikroarhitekturnyh-struktur-cpu-amd\" \/>\n\t\t<meta property=\"og:image\" content=\"https:\/\/prohoster.info\/wp-content\/uploads\/2021\/11\/logo-350.jpg\" \/>\n\t\t<meta property=\"og:image:secure_url\" content=\"https:\/\/prohoster.info\/wp-content\/uploads\/2021\/11\/logo-350.jpg\" \/>\n\t\t<meta property=\"og:image:width\" content=\"350\" \/>\n\t\t<meta property=\"og:image:height\" content=\"350\" \/>\n\t\t<meta property=\"article:published_time\" content=\"2025-07-09T21:11:55+00:00\" \/>\n\t\t<meta property=\"article:modified_time\" content=\"2025-07-09T21:11:55+00:00\" \/>\n\t\t<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/prohoster\" \/>\n\t\t<meta property=\"article:author\" content=\"https:\/\/www.facebook.com\/prohoster\" \/>\n\t\t<!-- All in One SEO -->\n\n","aioseo_head_json":{"title":"\ud83e\udd47TSA attack leading to information leakage from the microarchitectural structures of AMD CPUs | ProHoster","description":"AMD has disclosed information about a new class of microarchitectural attacks on its processors - TSA (Transient Scheduler Attack).","canonical_url":"https:\/\/prohoster.info\/hu\/blog\/news\/ataka-tsa-privodyashhaya-k-utechke-informaczii-iz-mikroarhitekturnyh-struktur-cpu-amd","robots":"max-image-preview:large","keywords":"","webmasterTools":{"miscellaneous":""},"schema":null,"og:locale":"hu_HU","og:site_name":"ProHoster | \u041a\u0443\u043f\u0438\u0442\u044c \u043d\u0430\u0434\u0435\u0436\u043d\u044b\u0439 \u0445\u043e\u0441\u0442\u0438\u043d\u0433 \u0434\u043b\u044f \u0441\u0430\u0439\u0442\u043e\u0432 \u0441 \u0437\u0430\u0449\u0438\u0442\u043e\u0439 \u043e\u0442 DDoS, VPS VDS \u0441\u0435\u0440\u0432\u0435\u0440\u044b","og:type":"article","og:title":"\ud83e\udd47\u0410\u0442\u0430\u043a\u0430 TSA, \u043f\u0440\u0438\u0432\u043e\u0434\u044f\u0449\u0430\u044f \u043a \u0443\u0442\u0435\u0447\u043a\u0435 \u0438\u043d\u0444\u043e\u0440\u043c\u0430\u0446\u0438\u0438 \u0438\u0437 \u043c\u0438\u043a\u0440\u043e\u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u043d\u044b\u0445 \u0441\u0442\u0440\u0443\u043a\u0442\u0443\u0440 CPU AMD | ProHoster","og:description":"\u041a\u043e\u043c\u043f\u0430\u043d\u0438\u044f AMD \u0440\u0430\u0441\u043a\u0440\u044b\u043b\u0430 \u0438\u043d\u0444\u043e\u0440\u043c\u0430\u0446\u0438\u044e \u043d\u043e\u0432\u043e\u043c \u043a\u043b\u0430\u0441\u0441\u0435 \u043c\u0438\u043a\u0440\u043e\u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u043d\u044b\u0445 \u0430\u0442\u0430\u043a \u043d\u0430 \u0441\u0432\u043e\u0438 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u044b - 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