{"id":181998,"date":"2026-06-10T02:48:19","date_gmt":"2026-06-10T00:48:19","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/opublikovan-vortex-3-0-otkrytyj-gpgpu-na-baze-arhitektury-risc-v"},"modified":"2026-06-10T02:48:19","modified_gmt":"2026-06-10T00:48:19","slug":"opublikovan-vortex-3-0-otkrytyj-gpgpu-na-baze-arhitektury-risc-v","status":"publish","type":"post","link":"https:\/\/prohoster.info\/hu\/blog\/news\/opublikovan-vortex-3-0-otkrytyj-gpgpu-na-baze-arhitektury-risc-v","title":{"rendered":"Megjelent a Vortex 3.0, a RISC-V architekt\u00far\u00e1ra \u00e9p\u00fcl\u0151 ny\u00edlt GPGPU","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Meg\u00e9rkezett a Vortex 3.0 projekt kiad\u00e1sa, amely a RISC-V utas\u00edt\u00e1ssor architekt\u00far\u00e1ra \u00e9p\u00fcl\u0151 nyitott GPGPU-t fejleszti, p\u00e1rhuzamos sz\u00e1m\u00edt\u00e1sok v\u00e9grehajt\u00e1s\u00e1ra alkalmas az OpenCL API \u00e9s a SIMT (Single Instruction, Multiple Threads) v\u00e9grehajt\u00e1si modell seg\u00edts\u00e9g\u00e9vel. A projekt tov\u00e1bbi kutat\u00e1sokhoz is felhaszn\u00e1lhat\u00f3 a 3D grafika ter\u00fclet\u00e9n, valamint \u00faj GPU architekt\u00far\u00e1k kifejleszt\u00e9s\u00e9hez. Az \u00e1br\u00e1k, a hardverblokk le\u00edr\u00e1sok Verilog nyelven, a szimul\u00e1torok, vezet\u0151programok \u00e9s a kapcsol\u00f3d\u00f3 projekt dokument\u00e1ci\u00f3 Apache 2.0 licenc alatt terjesztett. <\/p>\n<p>A GPGPU alapja a RISC-V architekt\u00fara, amelyet kieg\u00e9sz\u00edt\u0151 utas\u00edt\u00e1sokkal l\u00e1ttak el a GPU funkci\u00f3k \u00e9s a sz\u00e1lkezel\u00e9s t\u00e1mogat\u00e1s\u00e1ra. A RISC-V utas\u00edt\u00e1sk\u00e9szlet architekt\u00far\u00e1j\u00e1ban a v\u00e1ltoztat\u00e1sokat minim\u00e1lisra cs\u00f6kkentett\u00e9k, \u00e9s ha lehets\u00e9ges, m\u00e1r megl\u00e9v\u0151 vektor utas\u00edt\u00e1sokat haszn\u00e1lnak. A kieg\u00e9sz\u00edt\u0151 utas\u00edt\u00e1sok k\u00f6z\u00f6tt szerepel: &#171;tex&#187; a text\u00far\u00e1k feldolgoz\u00e1s\u00e1nak gyors\u00edt\u00e1s\u00e1ra; vx_rast a raszteriz\u00e1l\u00e1s ir\u00e1ny\u00edt\u00e1s\u00e1ra, vx_rop a fragmentumok, m\u00e9lys\u00e9g \u00e9s \u00e1tl\u00e1tsz\u00f3s\u00e1g kezel\u00e9s\u00e9re; vx_imadd a &#171;szorozni \u00e9s \u00f6sszeadni&#187; m\u0171velet v\u00e9grehajt\u00e1s\u00e1ra; vx_wspawn, vx_split, vx_join, vx_tmc \u00e9s vx_bar a sz\u00e1lcsoportok (wavefront) aktiv\u00e1l\u00e1s\u00e1ra, amelyeket p\u00e1rhuzamosan hajt v\u00e9gre a SIMD Engine. <\/p>\n<p><center><img decoding=\"async\" src=\"\/wp-content\/uploads\/2026\/06\/caa6274ce0dd622a2ebc01d60302d645.png\" style=\"display:block;margin: 0 auto;\" \/><\/center><\/p>\n<p>Az \u00faj GPGPU t\u00e1mogatja a 32- \u00e9s 64-bites RISC-V utas\u00edt\u00e1sk\u00e9szleteket, az RV32IMF-t \u00e9s az RV64IMAFD-t, \u00e9s tartalmazhat opcion\u00e1lis megosztott mem\u00f3ri\u00e1t, L1, L2 \u00e9s L3 cache-eket, valamint \u00e1ll\u00edthat\u00f3 sz\u00e1m\u00fa magot, feladatblokkot (warp) \u00e9s sz\u00e1lat. Minden egyes mag sz\u00e1m\u00e1ra lehet\u0151s\u00e9g van az \u00e1ll\u00edthat\u00f3 sz\u00e1m\u00fa ALU, FPU, LSU \u00e9s SFU aktiv\u00e1l\u00e1s\u00e1ra. Protot\u00edpusok l\u00e9trehoz\u00e1s\u00e1hoz Xilinx \u00e9s Altera FPGA-k haszn\u00e1lhat\u00f3k, a chipek m\u0171k\u00f6d\u00e9s\u00e9nek szimul\u00e1ci\u00f3j\u00e1ra pedig Verilator (Verilog szimul\u00e1tor), RTLSIM (RTL szimul\u00e1ci\u00f3) \u00e9s SimX (szoftveres szimul\u00e1ci\u00f3) alkalmazhat\u00f3.<\/p>\n<p>Alkalmaz\u00e1sok fejleszt\u00e9s\u00e9hez egy olyan eszk\u00f6zk\u00e9szlet \u00e1ll rendelkez\u00e9sre, amely tartalmazza a Vortex m\u0171k\u00f6d\u00e9s\u00e9hez alkalmazott PoCL (OpenCL ford\u00edt\u00f3 \u00e9s runtime), LLVM\/Clang, GCC \u00e9s Binutils m\u00f3dos\u00edtott verzi\u00f3it. A projekt t\u00e1mogatja az OpenCL 1.2 specifik\u00e1ci\u00f3t, \u00e9s az OpenCL-be val\u00f3 ford\u00edt\u00e1son kereszt\u00fcl megval\u00f3s\u00edtja a SPIR-V shaderek k\u00f6ztes reprezent\u00e1ci\u00f3j\u00e1nak t\u00e1mogat\u00e1s\u00e1t.  <\/p>\n<p>A Vortex 3.0-ban v\u00e9grehajtott v\u00e1ltoztat\u00e1sok k\u00f6z\u00f6tt szerepel:<\/p>\n<ul>\n<li class=\"l\"> Hozz\u00e1adt\u00e1k a hardveres grafikai verem teljes\u00edtm\u00e9ny\u00e9t, bele\u00e9rtve a raszteriz\u00e1l\u00e1si, text\u00fara \u00e1tfed\u00e9si \u00e9s kimeneti egyes\u00edt\u00e9si (OM \u2014 Output Merger) egys\u00e9geket. A megval\u00f3s\u00edtott grafikai verem \u00e9s a lavapipe szoftveres raszteriz\u00e1l\u00f3 alapj\u00e1n a Mesa sz\u00e1m\u00e1ra elk\u00e9sz\u00fclt a vortexpipe Vulkan-illeszt\u0151program.\n<li class=\"l\"> Kiterjesztett\u00e9k a tensoros mag k\u00e9pess\u00e9geit, amely a g\u00e9pi tanul\u00e1si modellek v\u00e9grehajt\u00e1s\u00e1nak felgyors\u00edt\u00e1s\u00e1ra szolg\u00e1l, \u00e9s t\u00e1mogatja a struktur\u00e1lt sparszit\u00e1s (structured sparsity) megval\u00f3s\u00edt\u00e1s\u00e1t a s\u00falym\u00e1trixok t\u00f6m\u00f6r\u00edt\u00e9s\u00e9hez.\n<li class=\"l\"> Megval\u00f3sult a WGMMA (warpgroup-level matrix multiplication) m\u0171velet a m\u00e1trixok aszinkron m\u00f3don t\u00f6rt\u00e9n\u0151 szorz\u00e1s\u00e1ra.\n<li class=\"l\"> Hozz\u00e1adt\u00e1k a DXA (Data Transfer Acceleration) motorj\u00e1t, amely felgyors\u00edtja az adatok glob\u00e1lisb\u00f3l helyi mem\u00f3ria \u00e1tvitel\u00e9t.\n<li class=\"l\"> Az \u00faj architekt\u00fara megval\u00f3sult parancsprocesszor (CP, Command Processor) \u00e9s a sz\u00e1m\u00edt\u00e1si magok hardveres \u00fctemez\u0151je (KMU \u2014 Kernel Management Unit) seg\u00edts\u00e9g\u00e9vel, amely lehet\u0151v\u00e9 teszi a sz\u00e1m\u00edt\u00e1si sz\u00e1lak \u00fctemez\u00e9si m\u0171veleteinek chip oldalra t\u00f6rt\u00e9n\u0151 \u00e1thelyez\u00e9s\u00e9t.\n<li class=\"l\"> \u00daj, blokkol\u00e1smentes \u00fczemm\u00f3dban m\u0171k\u00f6d\u0151 runtime k\u00f6nyvt\u00e1r ker\u00fclt javaslatra, amely absztrakci\u00f3kat biztos\u00edt, amelyek a hardveres aszinkron v\u00e9grehajtott parancsokba transzform\u00e1l\u00f3dnak. T\u00e1mogatj\u00e1k a sorokat, esem\u00e9nyeket, modulokat \u00e9s az aszinkron barrier alap\u00fa szinkroniz\u00e1ci\u00f3t arrive\/wait\/event szemantik\u00e1val.\n<li class=\"l\"> T\u00e1mogat\u00e1s ker\u00fclt a r\u00f6vid\u00edtett RISC-V (RVC) utas\u00edt\u00e1sokra.\n<li class=\"l\"> Hardveres t\u00e1mogat\u00e1st val\u00f3s\u00edtottak meg az atomos m\u0171veletekhez (Hardware Atomics).\n<li class=\"l\"> Teljesen \u00e1tdolgozt\u00e1k az FPU-t, \u00e9s \u00faj szorz\u00f3blokkokat (Wallace-tree, Folded-radix) \u00e9s \u00f6sszead\u00f3kat (Kogge-Stone) javasoltak.\n<li class=\"l\"> Hozz\u00e1adt\u00e1k a virtu\u00e1lis mem\u00f3ria verem\u00e9t az MMU (Memory Management Unit) vez\u00e9rl\u0151egys\u00e9g alapj\u00e1n, amely t\u00e1mogatja a 32 bites virtu\u00e1lis c\u00edmz\u00e9s SV32 architekt\u00far\u00e1j\u00e1t.\n<li class=\"l\"> T\u00e1mogat\u00e1s ker\u00fclt a RISC-V Zicond kiterjeszt\u00e9shez, amely felt\u00e9teles m\u0171veletek megval\u00f3s\u00edt\u00e1s\u00e1t seg\u00edti.\n<li class=\"l\"> Integr\u00e1lva lett a \u00f3rajel-ir\u00e1ny\u00edt\u00e1s (clock gating).\n<li class=\"l\"> Megval\u00f3sult a HIP (Heterogeneous Interface for Portability) nyelv t\u00e1mogat\u00e1sa a chipStar keretrendszeren kereszt\u00fcl, amely a HIP-et SPIR-V-be transzform\u00e1lja.\n<li class=\"l\"> Teljes k\u00f6r\u0171 integr\u00e1ci\u00f3 biztos\u00edtott a GEM5 szimul\u00e1torral, \u00e9s hozz\u00e1adt\u00e1k a SimX szimul\u00e1tor t\u00e1mogat\u00e1s\u00e1t a TLM (Transaction-Level Modeling) architekt\u00far\u00e1ra.\n<li class=\"l\"> T\u00e1mogat\u00e1s ker\u00fclt a Synopsys \u00e9s Yosys logikai szint\u00e9zis eszk\u00f6zeinek a chipgy\u00e1rt\u00e1s \u00e9rdek\u00e9ben, \u00e9s a ASAP7 (7nm), SAED14 (14nm) \u00e9s NanGate (15nm) szabv\u00e1nyos alkatr\u00e9sz k\u00f6nyvt\u00e1rak haszn\u00e1lata is biztos\u00edtott.\n<li class=\"l\"> A referencia eszk\u00f6zk\u00e9szlet friss\u00edtve lett az LLVM 20 \u00e9s POCL 7.0 verzi\u00f3kra.\n<\/ul>\n<p>Forr\u00e1s: <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=65652\">opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u0414\u043e\u0441\u0442\u0443\u043f\u0435\u043d \u0432\u044b\u043f\u0443\u0441\u043a \u043f\u0440\u043e\u0435\u043a\u0442\u0430 Vortex 3.0, \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u044e\u0449\u0435\u0433\u043e \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u0439 GPGPU \u043d\u0430 \u0431\u0430\u0437\u0435 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u044b \u043d\u0430\u0431\u043e\u0440\u0430 \u043a\u043e\u043c\u0430\u043d\u0434 RISC-V, \u0440\u0430\u0441\u0441\u0447\u0438\u0442\u0430\u043d\u043d\u044b\u0439 \u043d\u0430 \u0432\u044b\u043f\u043e\u043b\u043d\u0435\u043d\u0438\u0435 \u043f\u0430\u0440\u0430\u043b\u043b\u0435\u043b\u044c\u043d\u044b\u0445 \u0432\u044b\u0447\u0438\u0441\u043b\u0435\u043d\u0438\u0439 \u0441 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u0435\u043c API OpenCL \u0438 \u043c\u043e\u0434\u0435\u043b\u0438 \u0432\u044b\u043f\u043e\u043b\u043d\u0435\u043d\u0438\u044f SIMT (Single Instruction, Multiple Threads). \u041f\u0440\u043e\u0435\u043a\u0442 \u0442\u0430\u043a\u0436\u0435 \u043c\u043e\u0436\u0435\u0442 \u0431\u044b\u0442\u044c \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d \u043f\u0440\u0438 \u043f\u0440\u043e\u0432\u0435\u0434\u0435\u043d\u0438\u0438 \u0438\u0441\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u043d\u0438\u0439 \u0432 \u043e\u0431\u043b\u0430\u0441\u0442\u0438 3D-\u0433\u0440\u0430\u0444\u0438\u043a\u0438 \u0438 \u043f\u0440\u0438 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u043a\u0435 \u043d\u043e\u0432\u044b\u0445 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440 GPU. \u0421\u0445\u0435\u043c\u044b, \u043e\u043f\u0438\u0441\u0430\u043d\u0438\u044f \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u044b\u0445 \u0431\u043b\u043e\u043a\u043e\u0432 \u043d\u0430 \u044f\u0437\u044b\u043a\u0435 Verilog, [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":8,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-181998","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.3 - aioseo.com -->\n\t<meta name=\"description\" content=\"\u0414\u043e\u0441\u0442\u0443\u043f\u0435\u043d \u0432\u044b\u043f\u0443\u0441\u043a \u043f\u0440\u043e\u0435\u043a\u0442\u0430 Vortex 3.0, \u0440\u0430\u0437\u0432\u0438\u0432\u0430\u044e\u0449\u0435\u0433\u043e \u043e\u0442\u043a\u0440\u044b\u0442\u044b\u0439 GPGPU \u043d\u0430 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