{"id":34796,"date":"2019-10-31T22:00:27","date_gmt":"2019-10-31T19:00:27","guid":{"rendered":"https:\/\/prohoster.info\/blog\/opublikovany-ishodniki-yader-mips32-microaptiv-po-programme-mips-open\/"},"modified":"2019-10-31T22:00:27","modified_gmt":"2019-10-31T19:00:27","slug":"opublikovany-ishodniki-yader-mips32-microaptiv-po-programme-mips-open","status":"publish","type":"post","link":"https:\/\/prohoster.info\/hu\/blog\/news\/opublikovany-ishodniki-yader-mips32-microaptiv-po-programme-mips-open","title":{"rendered":"Megjelentek a MIPS32 microAptiv magok forr\u00e1sk\u00f3djai a MIPS Open program keret\u00e9ben.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>A Wave Computing (Wave Computing, formerly MIPS Technologies, which was acquired by Imagination Technologies and later regained independent status after its restructuring) announced the release of the MIPS32 microAptiv processor cores source code as part of the MIPS Open program.<\/p>\n<p>The code has been released for two classes of cores:<\/p>\n<ul>\n<li>microAptiv MCU core \u2013 a microcontroller core for embedded real-time systems.\n<\/li>\n<li>microAptiv MPU core \u2013 includes a cache controller and memory management unit (MMU) allowing for the running of full-fledged operating systems such as Linux.<br \/>\n<noindex><\/li>\n<\/ul>\n<p>A <a rel=\"nofollow\" href=\"https:\/\/www.mipsopen.com\/resources\/download\/\">downloads section<\/a>:<\/noindex>\n<\/p>\n<ul>\n<li>Document on MIPS Open architecture\n<\/li>\n<li>MIPS Open IDE Development Environment (versions for Linux and Windows)\n<\/li>\n<li>MIPS Open FPGA csomagok \u2014 MIPS Open magok futtat\u00e1s\u00e1hoz FPGA-n\n<\/li>\n<li>Source code for the microAptiv UP Core and microAptiv UC Core in the Verilog hardware description language\n<\/li>\n<\/ul>\n<p><noindex><\/p>\n<p>Downloading requires accepting the terms of the license agreement and registering on the website.<\/p>\n<p>Previously, Wave Computing <a rel=\"nofollow\" href=\"https:\/\/wavecomp.ai\/wave-computing-launches-the-mips-open-initiative\/\">announced the launch of the program<\/a> <a rel=\"nofollow\" href=\"https:\/\/www.mipsopen.com\/\">MIPS Open<\/a>, which allows participants to release their own cores with MIPS architecture without the need to pay for certification compliance, purchase the source code of the cores, make other royalty payments, and also grants access to the source code of existing MIPS cores developed by Wave Computing.<\/p>\n<p><\/noindex><\/p>\n<p>Forr\u00e1s: <a \ncontent=\"nofollow\" rel=\"nofollow\" href=\"http:\/\/www.linux.org.ru\/news\/hardware\/15024389\">linux.org.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u041a\u043e\u043c\u043f\u0430\u043d\u0438\u044f \u0412\u0435\u0439\u0432 \u041a\u043e\u043c\u043f\u044c\u044e\u0442\u0438\u043d\u0433 (Wave Computing, \u0431\u044b\u0432\u0448\u0430\u044f MIPS Technologies, \u0440\u0430\u043d\u0435\u0435 \u043f\u043e\u0433\u043b\u043e\u0449\u0435\u043d\u043d\u0430\u044f \u043a\u043e\u043c\u043f\u0430\u043d\u0438\u0435\u0439 Imagination Technologies \u0438 \u043f\u043e\u0441\u043b\u0435 \u0435\u0435 \u0440\u0430\u0441\u0447\u043b\u0435\u043d\u0435\u043d\u0438\u044f \u0441\u043d\u043e\u0432\u0430 \u043f\u043e\u043b\u0443\u0447\u0438\u0432\u0448\u0430\u044f \u0441\u0430\u043c\u043e\u0441\u0442\u043e\u044f\u0442\u0435\u043b\u044c\u043d\u044b\u0439 \u0441\u0442\u0430\u0442\u0443\u0441) \u043e\u0431\u044a\u044f\u0432\u0438\u043b\u0430 \u0432 \u043f\u0443\u0431\u043b\u0438\u043a\u0430\u0446\u0438\u0438 \u0438\u0441\u0445\u043e\u0434\u043d\u043e\u0433\u043e \u043a\u043e\u0434\u0430 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u044b\u0445 \u044f\u0434\u0435\u0440 MIPS32 microAptiv \u043f\u043e \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0435 MIPS Open. \u041e\u043f\u0443\u0431\u043b\u0438\u043a\u043e\u0432\u0430\u043d \u043a\u043e\u0434 \u0434\u043b\u044f \u0434\u0432\u0443\u0445 \u043a\u043b\u0430\u0441\u0441\u043e\u0432 \u044f\u0434\u0435\u0440: \u044f\u0434\u0440\u043e microAptiv MCU \u2013 \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u043d\u043e\u0435 \u044f\u0434\u0440\u043e \u0434\u043b\u044f \u0432\u0441\u0442\u0440\u0430\u0438\u0432\u0430\u0435\u043c\u044b\u0445 \u0441\u0438\u0441\u0442\u0435\u043c \u0440\u0435\u0430\u043b\u044c\u043d\u043e\u0433\u043e \u0432\u0440\u0435\u043c\u0435\u043d\u0438. \u044f\u0434\u0440\u043e microAptiv MPU core [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-34796","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in 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