{"id":54142,"date":"2019-12-19T00:00:00","date_gmt":"2019-12-18T21:00:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/blog_prohoster\/utechka-podtverzhdaet-uvelichenie-kesha-vtorogo-urovnya-u-budushhih-protsessorov-intel"},"modified":"2020-02-18T14:02:07","modified_gmt":"2020-02-18T11:02:07","slug":"utechka-podtverzhdaet-uvelichenie-kesha-vtorogo-urovnya-u-budushhih-protsessorov-intel","status":"publish","type":"post","link":"https:\/\/prohoster.info\/it\/blog\/news\/utechka-podtverzhdaet-uvelichenie-kesha-vtorogo-urovnya-u-budushhih-protsessorov-intel","title":{"rendered":"La fuga di notizie conferma l'aumento della cache di secondo livello per i futuri processori Intel","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Nel database del test delle prestazioni SiSoftware \u00e8 stata trovata una registrazione di un test effettuato su un server o una workstation costruita con due misteriosi processori Intel a sei core. Questi processori sono interessanti soprattutto per il loro volume piuttosto insolito di cache di secondo livello \u2014 1,25 MB per ogni core.<\/p>\n

\"La<\/p>\n

Questo \u00e8 cinque volte superiore rispetto ai 256 KB di cache L2 dei processori desktop Coffee Lake Refresh, e due volte e mezzo rispetto ai pi\u00f9 recenti chip Ice Lake-U, che hanno 512 KB per core. Inoltre, ci\u00f2 \u00e8 superiore del 25% rispetto agli attuali processori HEDT Core-X o ai server Xeon Scalable, che possiedono 1 MB di cache di secondo livello per core.<\/p>\n

\"La<\/p>\n

Pertanto, \u00e8 evidente che questo processore utilizza una delle nuove architetture Intel. Potrebbero essere Ice Lake a 10 nm o Tiger Lake, oppure Rocket Lake a 14 nm. Attualmente, si sa poco riguardo alle ultime due architetture, tuttavia una delle recenti fughe di notizie<\/a><\/noindex> su Tiger Lake indicava proprio la presenza di 1,25 MB di cache di secondo livello per ogni core.<\/p>\n

Allo stesso tempo, un'altra fuga di notizie<\/a><\/noindex> suggeriva che nella famiglia Tiger Lake saranno presentati solo processori mobili con un massimo di quattro core. A loro volta, i chip Rocket Lake offriranno fino a otto core. Inoltre, i chip a sei core testati in SiSoftware hanno meno cache di terzo livello rispetto ai Tiger Lake 'trapelati' in precedenza.<\/p>\n

<\/center><\/p>\n

E qui si pu\u00f2 gi\u00e0 ipotizzare che un volume inferiore di cache L3 possa essere il risultato di una disposizione meno densa dei transistor, ovvero un processo tecnologico 'pi\u00f9 grosso'. Non si pu\u00f2 escludere che qui stiamo osservando un trasferimento dell'architettura da un processo tecnologico 'pi\u00f9 sottile' a 10 nm, al vecchio e caro 14 nm. Proprio di recente... riportato<\/a><\/noindex>si \u00e8 affermato che Rocket Lake utilizzer\u00e0 una nuova architettura, ma su un vecchio processo tecnologico.<\/p>\n

\"La<\/p>\n

C'\u00e8 anche un'altra possibilit\u00e0: quanto descritto nei due paragrafi precedenti potrebbe non rivelarsi corretto, e potremmo trovarci di fronte a un sistema basato su due processori server Ice Lake-SP a 10 nm. Essi potrebbero avere gli stessi core dei mobile Ice Lake-U, ma per ogni core ci sar\u00e0 una maggiore quantit\u00e0 di cache di secondo livello. Per Intel, una tale pratica non \u00e8 nuova.<\/p>\n

In generale, \u00e8 difficile trarre conclusioni concrete basate su questo risultato. Le possibilit\u00e0, come vedete, sono molte, ma le prove sono poche. L'unica cosa di cui non si pu\u00f2 dubitare \u00e8 che questi processori a sei core non sono derivati da Skylake.<\/p>\n

<\/p>\n

<\/center><\/p>\n

\t\t\t\t


\n\t\t\t\t\t\t\t\t<\/center>
Fonte: 3dnews.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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