ืขืœื™ื‘ืื‘ื ืžื’ืœื” ืคื™ืชื•ื—ื™ื ื”ืงืฉื•ืจื™ื ืœืžืขื‘ื“ื™ XuanTie RISC-V

ืขืœื™ื‘ืื‘ื, ืื—ืช ืžื—ื‘ืจื•ืช ื”-IT ื”ืกื™ื ื™ื•ืช ื”ื’ื“ื•ืœื•ืช, ื”ื•ื“ื™ืขื” ืขืœ ื’ื™ืœื•ื™ ืคื™ืชื•ื—ื™ื ื”ืงืฉื•ืจื™ื ืœืœื™ื‘ื•ืช ื”ืžืขื‘ื“ XuanTie E902, E906, C906 ื•-C910, ืฉื ื‘ื ื• ืขืœ ื‘ืกื™ืก ืืจื›ื™ื˜ืงื˜ื•ืจืช ืขืจื›ืช ื”ื”ื•ืจืื•ืช RISC-V ืฉืœ 64 ืกื™ื‘ื™ื•ืช. ื”ื’ืจืขื™ื ื™ื ื”ืคืชื•ื—ื™ื ืฉืœ XuanTie ื™ืคื•ืชื—ื• ืชื—ืช ื”ืฉืžื•ืช ื”ื—ื“ืฉื™ื OpenE902, OpenE906, OpenC906 ื•-OpenC910.

ืกื›ื™ืžื•ืช, ืชื™ืื•ืจื™ื ืฉืœ ื‘ืœื•ืงื™ ื—ื•ืžืจื” ื‘ืฉืคืช Verilog, ืกื™ืžื•ืœื˜ื•ืจ ื•ืชื™ืขื•ื“ ืคืจื•ื™ืงื˜ ืงืฉื•ืจ ืžืชืคืจืกืžื™ื ื‘-GitHub ืชื—ืช ืจื™ืฉื™ื•ืŸ Apache 2.0. ื’ืจืกืื•ืช ืฉืคื•ืจืกืžื• ื‘ื ืคืจื“ ืฉืœ ืžื”ื“ืจื™ื GCC ื•-LLVM ื”ืžื•ืชืืžื™ื ืœืขื‘ื•ื“ื” ืขื ืฉื‘ื‘ื™ XuanTie, ืกืคืจื™ื™ืช Glibc, ืขืจื›ืช ื”ื›ืœื™ื ืฉืœ Binutils, ื˜ื•ืขืŸ ื”ืืชื—ื•ืœ U-Boot, ืœื™ื‘ืช ืœื™ื ื•ืงืก, ืžืžืฉืง ื”ืงื™ืฉื•ืจ ืฉืœ OpenSBI (RISC-V Supervisor Binary Interface), ืคืœื˜ืคื•ืจืžืช Yocto ืœื™ืฆื™ืจืช ืžืขืจื›ื•ืช ืœื™ื ื•ืงืก ืžืฉื•ื‘ืฆื•ืช, ื•ื’ื ืชื™ืงื•ื ื™ื ืœื”ืคืขืœืช ืคืœื˜ืคื•ืจืžืช ื”ืื ื“ืจื•ืื™ื“.

XuanTie C910, ืฉื‘ื‘ ื”ืงื•ื“ ื”ืคืชื•ื— ื”ื—ื–ืง ื‘ื™ื•ืชืจ, ืžื™ื•ืฆืจ ืขืœ ื™ื“ื™ T-Head ื‘ืชื”ืœื™ืš ืฉืœ 12nm ืขื ื’ืจืกืช 16 ืœื™ื‘ื•ืช ื”ืคื•ืขืœืช ื‘ืžื”ื™ืจื•ืช ืฉืœ 2.5GHz. ื‘ื™ืฆื•ืขื™ ื”ืฉื‘ื‘ ื‘ืžื‘ื—ืŸ Coremark ืžื’ื™ืขื™ื ืœ-7.1 Coremark/MHz, ืฉื”ื ืขื“ื™ืคื™ื ืขืœ ืžืขื‘ื“ื™ ARM Cortex-A73. ื‘ืกืš ื”ื›ืœ, ืขืœื™ื‘ืื‘ื ืคื™ืชื—ื” 11 ืฉื‘ื‘ื™ RISC-V ืฉื•ื ื™ื ืขื ื™ื•ืชืจ ืž-2.5 ืžื™ืœื™ืืจื“ ืขื•ืชืงื™ื ื›ื‘ืจ, ื•ื”ื—ื‘ืจื” ืคื•ืขืœืช ืœื”ืงืžืช ืžืขืจื›ืช ืืงื•ืœื•ื’ื™ืช ืฉืชืงื“ื ืขื•ื“ ื™ื•ืชืจ ืืช ืืจื›ื™ื˜ืงื˜ื•ืจืช RISC-V ืœื ืจืง ืขื‘ื•ืจ ืžื›ืฉื™ืจื™ IoT, ืืœื ื’ื ืขื‘ื•ืจ ืกื•ื’ื™ ืžื—ืฉื•ื‘ ืื—ืจื™ื ืžืขืจื›ื•ืช.

ื ื–ื›ื™ืจ ื›ื™ RISC-V ืžืกืคืงืช ืžืขืจื›ืช ืคืชื•ื—ื” ื•ื’ืžื™ืฉื” ืฉืœ ื”ื•ืจืื•ืช ืžื›ื•ื ื” ื”ืžืืคืฉืจืช ืœื™ืฆื•ืจ ืžื™ืงืจื•-ืžืขื‘ื“ื™ื ืœื™ื™ืฉื•ืžื™ื ืฉืจื™ืจื•ืชื™ื™ื, ืžื‘ืœื™ ืœื“ืจื•ืฉ ืชืžืœื•ื’ื™ื ื•ืœืœื ื”ื˜ืœืช ืชื ืื™ื ืœืฉื™ืžื•ืฉ. RISC-V ืžืืคืฉืจ ื™ืฆื™ืจืช SoC ื•ืžืขื‘ื“ื™ื ืคืชื•ื—ื™ื ืœื—ืœื•ื˜ื™ืŸ. ื ื›ื•ืŸ ืœืขื›ืฉื™ื•, ื‘ื”ืชื‘ืกืก ืขืœ ืžืคืจื˜ RISC-V, ื—ื‘ืจื•ืช ื•ืงื”ื™ืœื•ืช ืฉื•ื ื•ืช ืชื—ืช ืจื™ืฉื™ื•ื ื•ืช ื—ื•ืคืฉื™ื™ื ืฉื•ื ื™ื (BSD, MIT, Apache 2.0) ืžืคืชื—ื•ืช ื›ืžื” ืขืฉืจื•ืช ื’ืจืกืื•ืช ืฉืœ ืœื™ื‘ื•ืช ืžื™ืงืจื•-ืžืขื‘ื“ื™ื, SoCs ื•ืฉื‘ื‘ื™ื ืฉื›ื‘ืจ ืžื™ื•ืฆืจื™ื. ืžืขืจื›ื•ืช ื”ืคืขืœื” ืขื ืชืžื™ื›ื” ื˜ื•ื‘ื” ื‘-RISC-V ื›ื•ืœืœื•ืช GNU/Linux (ื ื•ื›ื— ืžืื– Glibc 2.27, binutils 2.30, gcc 7 ื•ืœื™ื‘ืช Linux 4.15), FreeBSD ื•-OpenBSD.

ื‘ื ื•ืกืฃ ืœ-RISC-V, ืขืœื™ื‘ืื‘ื ืžืคืชื—ืช ื’ื ืžืขืจื›ื•ืช ื”ืžื‘ื•ืกืกื•ืช ืขืœ ืืจื›ื™ื˜ืงื˜ื•ืจืช ARM64. ืœื“ื•ื’ืžื”, ื‘ืžืงื‘ื™ืœ ืœื’ื™ืœื•ื™ ื˜ื›ื ื•ืœื•ื’ื™ื•ืช XuanTie, ืžื•ืฆื’ ืฉืจืช ื—ื“ืฉ SoC Yitian 710, ื”ืžื›ื™ืœ 128 ืœื™ื‘ื•ืช ARMv9 ื‘ืขื™ืฆื•ื‘ ืžืฉืœื•, ื”ืคื•ืขืœื™ื ื‘ืชื“ืจ ืฉืœ 3.2 GHz. ืœืฉื‘ื‘ 8 ืขืจื•ืฆื™ ื–ื™ื›ืจื•ืŸ DDR5 ื•-96 ื ืชื™ื‘ื™ PCIe 5.0. ื‘ื™ื™ืฆื•ืจ ื”ืฉื‘ื‘ ื ืขืฉื” ืฉื™ืžื•ืฉ ื‘ืชื”ืœื™ืš ื™ื™ืฆื•ืจ ืฉืœ 5 ื ื ื•ืžื˜ืจ ืฉืื™ืคืฉืจ ืœืฉืœื‘ ื›-628 ืžื™ืœื™ืืจื“ ื˜ืจื ื–ื™ืกื˜ื•ืจื™ื ืขืœ ืžืฆืข ืฉืœ 60 ืž"ืจ. ืžื‘ื—ื™ื ืช ื‘ื™ืฆื•ืขื™ื, ื”-Yitian 710 ืขื•ืœื” ืขืœ ืฉื‘ื‘ื™ ื”-ARM ื”ืžื”ื™ืจื™ื ื‘ื™ื•ืชืจ ื‘ื›-20%, ื•ืžื‘ื—ื™ื ืช ืฆืจื™ื›ืช ื”ื—ืฉืžืœ ื”ื•ื ื™ืขื™ืœ ื™ื•ืชืจ ื‘ื›-50%.

ืžืงื•ืจ: OpenNet.ru

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