{"id":116366,"date":"2024-06-05T15:40:14","date_gmt":"2024-06-05T13:40:14","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/nabor-patchej-dlya-uskoreniya-shifrovaniya-deshifrovaniya-aes-gcm"},"modified":"2024-06-05T15:40:14","modified_gmt":"2024-06-05T13:40:14","slug":"nabor-patchej-dlya-uskoreniya-shifrovaniya-deshifrovaniya-aes-gcm","status":"publish","type":"post","link":"https:\/\/prohoster.info\/nl\/blog\/news\/nabor-patchej-dlya-uskoreniya-shifrovaniya-deshifrovaniya-aes-gcm","title":{"rendered":"Een set patches voor het versnellen van AES-GCM encryptie\/decryptie.","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

\"Een <\/p>\n

Op 2 juni presenteerde Eric Biggers (ingenieur bij Google) nieuwe implementaties van AES-XTS voor veel hogere prestaties van Intel\/AMD-processoren met behulp van nieuwe instructiesets AES-NI + AVX, VAES + AVX2, VAES + AVX10\/256 en VAES + AVX10\/512.<\/p>\n

De AES-NI GCM-code vervangt de eerdere versie die door Intel is geschreven en lost de bestaande problemen op:<\/p>\n

\n

\u00abDeze update voegt de implementatie van AES-GCM (Galois\/Counter-modus) toe aan VAES en AVX512\/AVX10, wat de prestaties van AES-GCM tot 162% verhoogt. Bovendien vervangt het de oudere AES-NI GCM-code van Intel door nieuwe code, die iets sneller is en een aantal problemen oplost, waaronder de enorme binaire bestandsgrootte van meer dan 250 KB. Voor details zie de correcties.<\/p>\n<\/blockquote>\n

\n

De uiteindelijke staat van de x86_64 AES-GCM assemblercode is dat we twee assemblerbestanden krijgen: \u00e9\u00e9n genereert AES-NI-code met of zonder AVX en de andere genereert VAES-code met AVX512\/AVX10 met 256-bits of 512-bits vectoren. Het mist ondersteuning voor enkele VAES (zonder AVX512\/AVX10). Dit verschilt een beetje van wat ik deed met AES-XTS, waar \u00e9\u00e9n bestand AVX en AVX512\/AVX10-code genereert, inclusief code die alleen VAES gebruikt (zonder AVX512\/AVX10), en een ander bestand alleen generatiecode die verschilt van AVX. Echter, op dit moment lijkt dit de juiste keuze voor elk specifiek algoritme, gezien het feit dat de beperking tot 16 SIMD-registers en 128-bits vectoren heeft geleid tot enkele aanzienlijk verschillende ontwerpoplossingen in AES-GCM, maar niet zoveel voor AES-XTS. Processors die alleen met VAES worden geleverd, lijken ook een tijdelijk verschijnsel, dus mogelijk moeten we niet te veel proberen deze combinatie te ondersteunen.\u00bb<\/p>\n<\/blockquote>\n

Bron: linux.org.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

2 \u0438\u044e\u043d\u044f \u042d\u0440\u0438\u043a \u0411\u0438\u0433\u0433\u0435\u0440\u0441 (\u0438\u043d\u0436\u0435\u043d\u0435\u0440 \u0438\u0437 Google) \u043f\u0440\u0435\u0434\u0441\u0442\u0430\u0432\u0438\u043b \u043d\u043e\u0432\u044b\u0435 \u0440\u0435\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0438 AES-XTS \u0434\u043b\u044f \u0433\u043e\u0440\u0430\u0437\u0434\u043e \u0431\u043e\u043b\u0435\u0435 \u0432\u044b\u0441\u043e\u043a\u043e\u0439 \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0435\u043b\u044c\u043d\u043e\u0441\u0442\u0438 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043e\u0432 Intel\/AMD \u0441 \u043f\u043e\u043c\u043e\u0449\u044c\u044e \u043d\u043e\u0432\u044b\u0445 \u043d\u0430\u0431\u043e\u0440\u043e\u0432 \u043a\u043e\u0434\u0430 AES-NI + AVX, VAES + AVX2, VAES + AVX10\/256 \u0438 VAES + AVX10\/512. \u041a\u043e\u0434 AES-NI GCM \u0437\u0430\u043c\u0435\u043d\u044f\u0435\u0442 \u0441\u043e\u0431\u043e\u0439 \u043f\u0440\u0435\u0434\u044b\u0434\u0443\u0449\u0438\u0439, \u043d\u0430\u043f\u0438\u0441\u0430\u043d\u043d\u044b\u0439 Intel, \u0438 \u0443\u0441\u0442\u0440\u0430\u043d\u044f\u0435\u0442 \u0441\u0443\u0449\u0435\u0441\u0442\u0432\u0443\u044e\u0449\u0438\u0435 \u0432\u044b\u044f\u0432\u043b\u0435\u043d\u043d\u044b\u0435 \u043f\u0440\u043e\u0431\u043b\u0435\u043c\u044b: «\u042d\u0442\u043e\u0442 \u043d\u0430\u0431\u043e\u0440 \u043e\u0431\u043d\u043e\u0432\u043b\u0435\u043d\u0438\u0439 \u0434\u043e\u0431\u0430\u0432\u043b\u044f\u0435\u0442 \u0432 VAES […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":116367,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-116366","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Patchset voor het versnellen van AES-GCM encryptie\/decryptie | ProHoster","description":"Op 2 juni presenteerde Eric Biggers (ingenieur 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