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Kuwunika kwachiwiri kwa HDMI kupita ku Raspberry Pi3 kudzera pa mawonekedwe a DPI ndi bolodi la FPGA


Kanemayu akuwonetsa: bolodi la Raspberry Pi3, lolumikizidwa nalo kudzera pa cholumikizira cha GPIO ndi bolodi la FPGA Mars Rover2rpi (Cyclone IV), pomwe chowunikira cha HDMI chimalumikizidwa. Chowunikira chachiwiri chimalumikizidwa kudzera pa cholumikizira cha HDMI cha Raspberry Pi3. Chilichonse chimagwira ntchito limodzi ngati pulogalamu yapawiri yowunika.

Kenako ndikuuzani momwe izi zimagwiritsidwira ntchito.

Bolodi lodziwika bwino la Raspberry Pi3 lili ndi cholumikizira cha GPIO chomwe mutha kulumikiza makhadi okulitsa osiyanasiyana: masensa, ma LED, oyendetsa ma stepper motor ndi zina zambiri. Ntchito yeniyeni ya pini iliyonse pa cholumikizira zimadalira kasinthidwe ka doko. Kukonzekera kwa GPIO ALT2 kumakupatsani mwayi wosinthira cholumikizira ku mawonekedwe a DPI, Display Parallel Interface. Pali makhadi okulitsa olumikiza zowunikira za VGA kudzera pa DPI. Komabe, choyamba, owunikira a VGA sakhalanso ofala ngati HDMI, ndipo kachiwiri, mawonekedwe a digito akuchulukirachulukira kuposa a analogue. Kuphatikiza apo, DAC pama board owonjezera a VGA nthawi zambiri amapangidwa ngati unyolo wa R-2-R ndipo nthawi zambiri osapitilira 6 bits pamtundu uliwonse.

Munjira ya ALT2, zikhomo zolumikizira za GPIO zili ndi tanthauzo ili:

Kuwunika kwachiwiri kwa HDMI kupita ku Raspberry Pi3 kudzera pa mawonekedwe a DPI ndi bolodi la FPGA

Apa ndapaka zikhomo za RGB za cholumikizira zofiira, zobiriwira ndi zabuluu motsatana. Zizindikiro zina zofunika ndi V-SYNC ndi H-SYNC siginecha, komanso CLK. Mafupipafupi a wotchi ya CLK ndi ma frequency omwe ma pixel amatulutsira pa cholumikizira; zimatengera makanema osankhidwa.

Kuti mulumikizane ndi chowunikira cha digito cha HDMI, muyenera kujambula ma DPI a mawonekedwe ndikusintha kukhala ma sign a HDMI. Izi zitha kuchitika, mwachitsanzo, pogwiritsa ntchito gulu la FPGA. Monga momwe zimakhalira, bolodi la Mars Rover2rpi ndiloyenera pazifukwa izi. Zowonadi, njira yayikulu yolumikizira bolodi kudzera pa adapter yapadera ikuwoneka motere:

Kuwunika kwachiwiri kwa HDMI kupita ku Raspberry Pi3 kudzera pa mawonekedwe a DPI ndi bolodi la FPGA

Bolodiyi imagwiritsidwa ntchito kuonjezera chiwerengero cha madoko a GPIO ndikugwirizanitsa zipangizo zambiri zozungulira ku rasipiberi. Nthawi yomweyo, ma siginecha a 4 GPIO okhala ndi kulumikizana uku amagwiritsidwa ntchito pazizindikiro za JTAG, kotero kuti pulogalamu yochokera ku Raspberry imatha kukweza firmware ya FPGA mu FPGA. Chifukwa cha izi, kulumikizana kwanthawi zonse sikundikwanira; Zizindikiro za 4 DPI zimasiya. Mwamwayi, zisa zowonjezera pa bolodi zimakhala ndi pinout yogwirizana ndi Raspberry. Chifukwa chake nditha kutembenuza bolodi madigiri 90 ndikulumikizabe ndi rasipiberi wanga:

Kuwunika kwachiwiri kwa HDMI kupita ku Raspberry Pi3 kudzera pa mawonekedwe a DPI ndi bolodi la FPGA

Zachidziwikire, muyenera kugwiritsa ntchito pulogalamu yakunja ya JTAG, koma ili si vuto.

Padakali vuto laling'ono. Si pini iliyonse ya FPGA yomwe ingagwiritsidwe ntchito ngati cholowetsa mawotchi. Pali mapini ochepa okha odzipereka omwe angagwiritsidwe ntchito pazolinga izi. Chifukwa chake zidapezeka kuti chizindikiro cha GPIO_0 CLK sichifikira kulowetsa kwa FPGA, komwe chitha kugwiritsidwa ntchito ngati cholowetsa mawotchi a FPGA. Choncho ndinafunikabe kuika waya umodzi pa mpango. Ndikulumikiza GPIO_0 ndi chizindikiro cha KEY[1] cha board:

Kuwunika kwachiwiri kwa HDMI kupita ku Raspberry Pi3 kudzera pa mawonekedwe a DPI ndi bolodi la FPGA

Tsopano ndikuwuzani pang'ono za polojekiti ya FPGA. Chovuta chachikulu pakupanga ma siginecha a HDMI ndi ma frequency apamwamba kwambiri. Mukayang'ana cholumikizira cholumikizira cha HDMI, mutha kuwona kuti ma siginecha a RGB tsopano ndi ma siginecha osiyanasiyana:

Kuwunika kwachiwiri kwa HDMI kupita ku Raspberry Pi3 kudzera pa mawonekedwe a DPI ndi bolodi la FPGA

Kugwiritsa ntchito chizindikiro chosiyana kumakupatsani mwayi wothana ndi kusokoneza wamba pamzere wopatsira. Pankhaniyi, code yoyambirira ya eyiti yamtundu uliwonse imasinthidwa kukhala 10-bit TMDS (Transition-minimized differential signing). Iyi ndi njira yapadera yolembera kuti muchotse gawo la DC kuchokera pa siginecha ndikuchepetsa kusinthana kwa siginecha pamzere wosiyana. Popeza ma bits 10 tsopano akuyenera kufalikira pamzere wa serial pamtundu umodzi wamtundu, zikuwoneka kuti liwiro la wotchi ya serializer kuyenera kukhala nthawi 10 kuposa liwiro la wotchi ya pixel. Ngati titenga mwachitsanzo mawonekedwe a kanema 1280x720 60Hz, ndiye kuti ma frequency a pixel amtunduwu ndi 74,25 MHz. The serializer ayenera kukhala 742,5 MHz.

Ma FPGA okhazikika, mwatsoka, sangathe kuchita izi. Komabe, mwamwayi kwa ife, FPGA ili ndi zikhomo za DDIO. Izi ndi zomaliza zomwe zili kale, monga titero, 2-to-1 serializers. Ndiko kuti, amatha kutulutsa ma bits awiri motsatizana m'mbali zokwera ndi zotsika za ma frequency a wotchi. Izi zikutanthauza kuti mu pulojekiti ya FPGA simungagwiritse ntchito 740 MHz, koma 370 MHz, koma muyenera kugwiritsa ntchito zinthu za DDIO mu FPGA. Tsopano 370 MHz kale ndi ma frequency otheka kukwaniritsa. Tsoka ilo, 1280x720 mode ndiye malire. Chisankho chapamwamba sichingapezeke mu Cyclone IV FPGA yathu yoyikidwa pa bolodi la Mars Rover2rpi.

Kotero, mu mapangidwe, kulowetsa kwa pixel frequency CLK kumapita ku PLL, komwe kumachulukitsidwa ndi 5. Pafupipafupi, R, G, B bytes amasinthidwa kukhala awiriawiri. Izi ndi zomwe encoder TMDS imachita. Khodi yochokera ku Verilog HDL ikuwoneka motere:

module hdmi(
	input wire pixclk,		// 74MHz
	input wire clk_TMDS2,	// 370MHz
	input wire hsync,
	input wire vsync,
	input wire active,
	input wire [7:0]red,
	input wire [7:0]green,
	input wire [7:0]blue,
	output wire TMDS_bh,
	output wire TMDS_bl,
	output wire TMDS_gh,
	output wire TMDS_gl,
	output wire TMDS_rh,
	output wire TMDS_rl
);

wire [9:0] TMDS_red, TMDS_green, TMDS_blue;
TMDS_encoder encode_R(.clk(pixclk), .VD(red  ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_red));
TMDS_encoder encode_G(.clk(pixclk), .VD(green), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_green));
TMDS_encoder encode_B(.clk(pixclk), .VD(blue ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_blue));

reg [2:0] TMDS_mod5=0;  // modulus 5 counter
reg [4:0] TMDS_shift_bh=0, TMDS_shift_bl=0;
reg [4:0] TMDS_shift_gh=0, TMDS_shift_gl=0;
reg [4:0] TMDS_shift_rh=0, TMDS_shift_rl=0;

wire [4:0] TMDS_blue_l  = {TMDS_blue[9],TMDS_blue[7],TMDS_blue[5],TMDS_blue[3],TMDS_blue[1]};
wire [4:0] TMDS_blue_h  = {TMDS_blue[8],TMDS_blue[6],TMDS_blue[4],TMDS_blue[2],TMDS_blue[0]};
wire [4:0] TMDS_green_l = {TMDS_green[9],TMDS_green[7],TMDS_green[5],TMDS_green[3],TMDS_green[1]};
wire [4:0] TMDS_green_h = {TMDS_green[8],TMDS_green[6],TMDS_green[4],TMDS_green[2],TMDS_green[0]};
wire [4:0] TMDS_red_l   = {TMDS_red[9],TMDS_red[7],TMDS_red[5],TMDS_red[3],TMDS_red[1]};
wire [4:0] TMDS_red_h   = {TMDS_red[8],TMDS_red[6],TMDS_red[4],TMDS_red[2],TMDS_red[0]};

always @(posedge clk_TMDS2)
begin
	TMDS_shift_bh <= TMDS_mod5[2] ? TMDS_blue_h  : TMDS_shift_bh  [4:1];
	TMDS_shift_bl <= TMDS_mod5[2] ? TMDS_blue_l  : TMDS_shift_bl  [4:1];
	TMDS_shift_gh <= TMDS_mod5[2] ? TMDS_green_h : TMDS_shift_gh  [4:1];
	TMDS_shift_gl <= TMDS_mod5[2] ? TMDS_green_l : TMDS_shift_gl  [4:1];
	TMDS_shift_rh <= TMDS_mod5[2] ? TMDS_red_h   : TMDS_shift_rh  [4:1];
	TMDS_shift_rl <= TMDS_mod5[2] ? TMDS_red_l   : TMDS_shift_rl  [4:1];
	TMDS_mod5 <= (TMDS_mod5[2]) ? 3'd0 : TMDS_mod5+3'd1;
end

assign TMDS_bh = TMDS_shift_bh[0];
assign TMDS_bl = TMDS_shift_bl[0];
assign TMDS_gh = TMDS_shift_gh[0];
assign TMDS_gl = TMDS_shift_gl[0];
assign TMDS_rh = TMDS_shift_rh[0];
assign TMDS_rl = TMDS_shift_rl[0];

endmodule

module TMDS_encoder(
	input clk,
	input [7:0] VD,	// video data (red, green or blue)
	input [1:0] CD,	// control data
	input VDE,  	// video data enable, to choose between CD (when VDE=0) and VD (when VDE=1)
	output reg [9:0] TMDS = 0
);

wire [3:0] Nb1s = VD[0] + VD[1] + VD[2] + VD[3] + VD[4] + VD[5] + VD[6] + VD[7];
wire XNOR = (Nb1s>4'd4) || (Nb1s==4'd4 && VD[0]==1'b0);
wire [8:0] q_m = {~XNOR, q_m[6:0] ^ VD[7:1] ^ {7{XNOR}}, VD[0]};

reg [3:0] balance_acc = 0;
wire [3:0] balance = q_m[0] + q_m[1] + q_m[2] + q_m[3] + q_m[4] + q_m[5] + q_m[6] + q_m[7] - 4'd4;
wire balance_sign_eq = (balance[3] == balance_acc[3]);
wire invert_q_m = (balance==0 || balance_acc==0) ? ~q_m[8] : balance_sign_eq;
wire [3:0] balance_acc_inc = balance - ({q_m[8] ^ ~balance_sign_eq} & ~(balance==0 || balance_acc==0));
wire [3:0] balance_acc_new = invert_q_m ? balance_acc-balance_acc_inc : balance_acc+balance_acc_inc;
wire [9:0] TMDS_data = {invert_q_m, q_m[8], q_m[7:0] ^ {8{invert_q_m}}};
wire [9:0] TMDS_code = CD[1] ? (CD[0] ? 10'b1010101011 : 10'b0101010100) : (CD[0] ? 10'b0010101011 : 10'b1101010100);

always @(posedge clk) TMDS <= VDE ? TMDS_data : TMDS_code;
always @(posedge clk) balance_acc <= VDE ? balance_acc_new : 4'h0;

endmodule

Kenako awiriawiri omwe amatuluka amadyetsedwa ku DDIO, yomwe imatulutsa chizindikiro chapang'ono pang'ono m'mphepete mwakukwera ndi kugwa.

DDIO yokha ikhoza kufotokozedwa ndi nambala yotsatira ya Verilog:

module ddio(
	input wire d0,
	input wire d1,
	input wire clk,
	output wire out
	);

reg r_d0;
reg r_d1;
always @(posedge clk)
begin
	r_d0 <= d0;
	r_d1 <= d1;
end
assign out = clk ? r_d0 : r_d1;
endmodule

Koma mwina sizingagwire ntchito mwanjira imeneyo. Muyenera kugwiritsa ntchito Alter's megafunction ALTDDIO_OUT kuti mutsegule zotulutsa za DDIO. Pulojekiti yanga imagwiritsa ntchito gawo la library la ALTDDIO_OUT.

Izi zitha kuwoneka ngati zovuta, koma zimagwira ntchito.

Mutha kuwona zolemba zonse zolembedwa mu Verilog HDL pa github.

Firmware yophatikizidwa ya FPGA imawunikira mu chipangizo cha EPCS choyikidwa pa bolodi la Mars Rover2rpi. Chifukwa chake, mphamvu ikagwiritsidwa ntchito pa bolodi la FPGA, FPGA idzakhazikitsidwa kuchokera ku flash memory ndikuyamba.

Tsopano tifunika kulankhula pang'ono za kasinthidwe ka Raspberry palokha.

Ndikuchita zoyeserera pa Raspberry PI OS (32 bit) kutengera Debian Buster, Version:August 2020,
Tsiku lotulutsidwa: 2020-08-20, mtundu wa Kernel: 5.4.

Muyenera kuchita zinthu ziwiri:

  • sinthani fayilo ya config.txt;
  • pangani kasinthidwe ka seva ya X kuti mugwire ntchito ndi oyang'anira awiri.

Mukakonza fayilo /boot/config.txt muyenera:

  1. kuletsa kugwiritsa ntchito i2c, i2s, spi;
  2. yambitsani mawonekedwe a DPI pogwiritsa ntchito zokutira dtoverlay=dpi24;
  3. sinthani makanema apakanema 1280 Γ— 720 60Hz, 24 bits pa pixel pa DPI;
  4. tchulani nambala yofunikira ya ma framebuffers 2 (max_framebuffers=2, pokhapo pomwe chipangizo chachiwiri /dev/fb1 chidzawonekera)

Mawu onse a fayilo ya config.txt akuwoneka motere.

# For more options and information see
# http://rpf.io/configtxt
# Some settings may impact device functionality. See link above for details

# uncomment if you get no picture on HDMI for a default "safe" mode
#hdmi_safe=1

# uncomment this if your display has a black border of unused pixels visible
# and your display can output without overscan
disable_overscan=1

# uncomment the following to adjust overscan. Use positive numbers if console
# goes off screen, and negative if there is too much border
#overscan_left=16
#overscan_right=16
#overscan_top=16
#overscan_bottom=16

# uncomment to force a console size. By default it will be display's size minus
# overscan.
#framebuffer_width=1280
#framebuffer_height=720

# uncomment if hdmi display is not detected and composite is being output
hdmi_force_hotplug=1

# uncomment to force a specific HDMI mode (this will force VGA)
#hdmi_group=1
#hdmi_mode=1

# uncomment to force a HDMI mode rather than DVI. This can make audio work in
# DMT (computer monitor) modes
#hdmi_drive=2

# uncomment to increase signal to HDMI, if you have interference, blanking, or
# no display
#config_hdmi_boost=4

# uncomment for composite PAL
#sdtv_mode=2

#uncomment to overclock the arm. 700 MHz is the default.
#arm_freq=800

# Uncomment some or all of these to enable the optional hardware interfaces
#dtparam=i2c_arm=on
#dtparam=i2s=on
#dtparam=spi=on

dtparam=i2c_arm=off
dtparam=spi=off
dtparam=i2s=off

dtoverlay=dpi24
overscan_left=0
overscan_right=0
overscan_top=0
overscan_bottom=0
framebuffer_width=1280
framebuffer_height=720
display_default_lcd=0
enable_dpi_lcd=1
dpi_group=2
dpi_mode=87
#dpi_group=1
#dpi_mode=4
dpi_output_format=0x6f027
dpi_timings=1280 1 110 40 220 720 1 5 5 20 0 0 0 60 0 74000000 3

# Uncomment this to enable infrared communication.
#dtoverlay=gpio-ir,gpio_pin=17
#dtoverlay=gpio-ir-tx,gpio_pin=18

# Additional overlays and parameters are documented /boot/overlays/README

# Enable audio (loads snd_bcm2835)
dtparam=audio=on

[pi4]
# Enable DRM VC4 V3D driver on top of the dispmanx display stack
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2

[all]
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2

Pambuyo pake, muyenera kupanga fayilo yosinthira kuti seva ya X igwiritse ntchito oyang'anira awiri pazithunzi ziwiri /dev/fb0 ndi /dev/fb1:

Fayilo yanga yosinthira /usr/share/x11/xorg.conf.d/60-dualscreen.conf ili chonchi

Section "Device"
        Identifier      "LCD"
        Driver          "fbturbo"
        Option          "fbdev" "/dev/fb0"
        Option          "ShadowFB" "off"
        Option          "SwapbuffersWait" "true"
EndSection

Section "Device"
        Identifier      "HDMI"
        Driver          "fbturbo"
        Option          "fbdev" "/dev/fb1"
        Option          "ShadowFB" "off"
        Option          "SwapbuffersWait" "true"
EndSection

Section "Monitor"
        Identifier      "LCD-monitor"
        Option          "Primary" "true"
EndSection

Section "Monitor"
        Identifier      "HDMI-monitor"
        Option          "RightOf" "LCD-monitor"
EndSection

Section "Screen"
        Identifier      "screen0"
        Device          "LCD"
        Monitor         "LCD-monitor"
EndSection

Section "Screen"
        Identifier      "screen1"
        Device          "HDMI" 
	Monitor         "HDMI-monitor"
EndSection

Section "ServerLayout"
        Identifier      "default"
        Option          "Xinerama" "on"
        Option          "Clone" "off"
        Screen 0        "screen0"
        Screen 1        "screen1" RightOf "screen0"
EndSection

Chabwino, ngati sichinayikidwe kale, muyenera kukhazikitsa Xinerama. Ndiye malo apakompyuta adzakulitsidwa kwathunthu kwa oyang'anira awiri, monga momwe tawonetsera muvidiyo yowonetsera pamwambapa.

Ndizo zonse. Tsopano, eni ake a Raspberry Pi3 azitha kugwiritsa ntchito zowunikira ziwiri.

Kufotokozera ndi zojambulajambula za board ya Mars Rover2rpi zitha kupezeka yang'anani apa.

Source: www.habr.com