Daniel Vetter, in\u017cynier z firmy Intel i jeden z opiekun\u00f3w subsystemu DRM, opublikowa\u0142 na li\u015bcie mailingowej deweloper\u00f3w j\u0105dra Linux plan wdro\u017cenia poprawek implementuj\u0105cych sterownik Xe, kt\u00f3ry jest przeznaczony do u\u017cycia z GPU opartymi na architekturze Intel Xe, stosowanym w kartach graficznych rodziny Arc oraz w zintegrowanej grafice, pocz\u0105wszy od procesor\u00f3w Tiger Lake. Sterownik Xe jest promowany jako fundament dla wsparcia nowych chip\u00f3w, niezwi\u0105zany z kodem wspieraj\u0105cym starsze platformy. W ci\u0105gu 2023 roku planuje si\u0119 doprowadzi\u0107 poprawki do stanu u\u017cywalno\u015bci dla entuzjast\u00f3w testuj\u0105cych, a tak\u017ce, je\u015bli to mo\u017cliwe, przeprowadzi\u0107 przegl\u0105d przez deweloper\u00f3w niezwi\u0105zanych z firm\u0105 Intel. W optymistycznym scenariuszu sterownik zostanie zaakceptowany do g\u0142\u00f3wnej ga\u0142\u0119zi j\u0105dra pod koniec roku. <\/p>\n
Obecnie w\u0142\u0105czeniu do g\u0142\u00f3wnej ga\u0142\u0119zi j\u0105dra przeszkadza fakt, \u017ce kod zosta\u0142 pierwotnie opracowany za zamkni\u0119tymi drzwiami w osobnej ga\u0142\u0119zi j\u0105dra, a teraz nale\u017cy przeprowadzi\u0107 dodatkow\u0105 prac\u0119 nad jego integracj\u0105 z aktualn\u0105 baz\u0105 kodu. Bior\u0105c pod uwag\u0119 niedawne negatywne do\u015bwiadczenia zwi\u0105zane z op\u00f3\u017anieniami w integracji istotnych zmian dla sterownika AMD, kt\u00f3re doprowadzi\u0142y do konieczno\u015bci przepisania cz\u0119\u015bci kodu, w celu uproszczenia post\u0119pu wprowadzenia przygotowanej bazy kodu sterownika Xe do g\u0142\u00f3wnego j\u0105dra proponuje si\u0119 w pierwszej kolejno\u015bci osi\u0105gni\u0119cie konsensusu w kwestiach wdro\u017cenia planisty i interakcji z innymi sterownikami. <\/p>\n
Sterownik Xe zbudowano z wykorzystaniem nowej architektury, w kt\u00f3rej bardziej aktywnie u\u017cywane s\u0105 ju\u017c istniej\u0105ce komponenty subsystemu DRM (Direct Rendering Manager), a tak\u017ce typowe komponenty sterownika i915, niezwi\u0105zane z konkretnymi GPU, na przyk\u0142ad kod do interakcji z ekranami, model pami\u0119ci oraz implementacja execbuf. W sterownikach Xe i i915 planuje si\u0119 zapewni\u0107 wsp\u00f3\u0142dzielenie wsp\u00f3lnego kodu, aby unikn\u0105\u0107 duplikacji typowych komponent\u00f3w. W Mesa dzia\u0142anie OpenGL i Vulkan na poziomie sterownika Xe jest realizowane z uwzgl\u0119dnieniem zmian wprowadzonych w istniej\u0105cych sterownikach Mesa Iris i ANV. \u0414\u044d\u043d\u0438\u0435\u043b \u0412\u0435\u0442\u0442\u0435\u0440 (Daniel Vetter), \u0438\u043d\u0436\u0435\u043d\u0435\u0440 \u0438\u0437 \u043a\u043e\u043c\u043f\u0430\u043d\u0438\u0438 Intel \u0438 \u043e\u0434\u0438\u043d \u0438\u0437 \u0441\u043e\u043f\u0440\u043e\u0432\u043e\u0436\u0434\u0430\u044e\u0449\u0438\u0445 \u043f\u043e\u0434\u0441\u0438\u0441\u0442\u0435\u043c\u0443 DRM, \u043e\u043f\u0443\u0431\u043b\u0438\u043a\u043e\u0432\u0430\u043b \u0432 \u0441\u043f\u0438\u0441\u043a\u0435 \u0440\u0430\u0441\u0441\u044b\u043b\u043a\u0438 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u043e\u0432 \u044f\u0434\u0440\u0430 Linux \u043f\u043b\u0430\u043d \u043f\u0440\u043e\u0434\u0432\u0438\u0436\u0435\u043d\u0438\u044f \u043f\u0430\u0442\u0447\u0435\u0439 \u0441 \u0440\u0435\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0435\u0439 \u0434\u0440\u0430\u0439\u0432\u0435\u0440\u0430 Xe, \u043f\u0440\u0435\u0434\u043d\u0430\u0437\u043d\u0430\u0447\u0435\u043d\u043d\u043e\u0433\u043e \u0434\u043b\u044f \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u044f \u0441 GPU \u043d\u0430 \u0431\u0430\u0437\u0435 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u044b Intel Xe, \u043a\u043e\u0442\u043e\u0440\u0430\u044f \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u0435\u0442\u0441\u044f \u0432 \u0432\u0438\u0434\u0435\u043e\u043a\u0430\u0440\u0442\u0430\u0445 \u0441\u0435\u043c\u0435\u0439\u0441\u0442\u0432\u0430 Arc \u0438 \u0438\u043d\u0442\u0435\u0433\u0440\u0438\u0440\u043e\u0432\u0430\u043d\u043d\u043e\u0439 \u0433\u0440\u0430\u0444\u0438\u043a\u0435, \u043d\u0430\u0447\u0438\u043d\u0430\u044f \u0441 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043e\u0432 Tiger Lake. \u0414\u0440\u0430\u0439\u0432\u0435\u0440 Xe \u043f\u043e\u0437\u0438\u0446\u0438\u043e\u043d\u0438\u0440\u0443\u0435\u0442\u0441\u044f […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-106905","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Opublikowano plan promocji sterownika Xe do j\u0105dra Linux dla GPU Intel | ProHoster","description":"Daniel Vetter, in\u017cynier z firmy Intel i jeden z opiekun\u00f3w systemu DRM, opublikowa\u0142 na li\u015bcie dyskusyjnej dla programist\u00f3w kernela Linux plan promocji poprawek z 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\u0179r\u00f3d\u0142o: opennet.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"