{"id":38437,"date":"2019-10-31T22:23:44","date_gmt":"2019-10-31T19:23:44","guid":{"rendered":"https:\/\/prohoster.info\/blog\/dzhim-keller-perspektivnye-mikroarhitektury-intel-obespechat-znachitelnyj-rost-proizvoditelnosti\/"},"modified":"2019-10-31T22:23:44","modified_gmt":"2019-10-31T19:23:44","slug":"dzhim-keller-perspektivnye-mikroarhitektury-intel-obespechat-znachitelnyj-rost-proizvoditelnosti","status":"publish","type":"post","link":"https:\/\/prohoster.info\/pt\/blog\/news\/dzhim-keller-perspektivnye-mikroarhitektury-intel-obespechat-znachitelnyj-rost-proizvoditelnosti","title":{"rendered":"Jim Keller: novas microarquiteturas da Intel garantir\u00e3o um aumento significativo no desempenho","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Segundo informa\u00e7\u00f5es reveladas ao mundo pelo vice-presidente s\u00eanior de tecnologia e arquitetura de sistemas da Intel, Jim Keller, sua empresa est\u00e1 atualmente trabalhando em uma nova microarquitetura que deve ser \"significativamente maior e mais pr\u00f3xima de uma rela\u00e7\u00e3o linear de desempenho em rela\u00e7\u00e3o ao n\u00famero de transistores\" do que o design atual Sunny Cove. Isso deve ser entendido como que, em alguns anos, teremos um processador que ser\u00e1 significativamente mais complexo e mais potente do que os CPUs que o gigante dos microprocessadores oferece atualmente.<\/p>\n

A nova microarquitetura Sunny Cove, que a Intel utiliza em seus novos processadores da gera\u00e7\u00e3o Ice Lake, representa um grande avan\u00e7o, pois ap\u00f3s um longo intervalo, ela elevou significativamente a medida IPC (instru\u00e7\u00f5es executadas por ciclo). No entanto, o guru dos processadores, Jim Keller, que atualmente trabalha na Intel, afirma que isso est\u00e1 longe de ser o ponto final. Ele est\u00e1 agora trabalhando na pr\u00f3xima gera\u00e7\u00e3o de microarquitetura, que poder\u00e1 aproveitar plenamente o aumento esperado do or\u00e7amento de transistores nos pr\u00f3ximos anos.<\/p>\n

\"Jim<\/p>\n

De acordo com estimativas da Intel, a vantagem dos n\u00facleos Sunny Cove em rela\u00e7\u00e3o aos n\u00facleos Coffee Lake em termos de desempenho espec\u00edfico alcan\u00e7a 15\u201318% (com a mesma frequ\u00eancia de clock). No entanto, o or\u00e7amento de transistores do Sunny Cove ultrapassa o or\u00e7amento do antecessor em uma quantidade consider\u00e1vel \u2013 na faixa de 38%. Segundo informa\u00e7\u00f5es divulgadas por Keller, um n\u00facleo com microarquitetura Sunny Cove \u00e9 composto por cerca de 300 milh\u00f5es de transistores de 10 nm, enquanto o n\u00facleo Coffee Lake cont\u00e9m aproximadamente 217 milh\u00f5es de transistores de 14 nm. Portanto, o aumento de desempenho no Sunny Cove n\u00e3o chega a acompanhar linearmente o aumento do or\u00e7amento de transistores: o progresso em desempenho ficou cerca de metade abaixo do aumento da complexidade do chip semicondutor. Na opini\u00e3o de Keller, isso n\u00e3o deveria ser assim.<\/p>\n

Em uma palestra na Universidade da Calif\u00f3rnia, Berkeley, um especialista proeminente da Intel abordou a evolu\u00e7\u00e3o das microarquiteturas dos processadores da Intel e, ao falar, n\u00e3o se deteve no Sunny Cove, mas mencionou um poss\u00edvel sucessor dessa microarquitetura: \"O Sunny Cove trabalha com 800 instru\u00e7\u00f5es simultaneamente, executando de 3 a 6 instru\u00e7\u00f5es x86 por ciclo... Ele possui preditores de dados massivos, preditores de desvio massivos. Mas estamos trabalhando em uma gera\u00e7\u00e3o de microarquitetura que \u00e9 significativamente maior, e a lei de crescimento de desempenho est\u00e1 mais pr\u00f3xima do linear. Esta \u00e9 realmente uma mudan\u00e7a importante de mentalidade\".<\/p>\n

<\/center><\/p>\n

A posi\u00e7\u00e3o do engenheiro estelar \u00e9 que a fabrica\u00e7\u00e3o de processadores ainda est\u00e1 longe do momento em que algum limite ser\u00e1 alcan\u00e7ado. Como diz Keller, a Intel tem planos ambiciosos para o futuro, incluindo um aumento de 50 vezes no n\u00famero de transistores em processadores e melhorias significativas em praticamente cada bloco funcional. E n\u00e3o h\u00e1 nada imposs\u00edvel nisso. Como explica Keller: \u00abOs computadores s\u00e3o criados por um enorme n\u00famero de pessoas, mas na verdade, isso \u00e9 um grande n\u00famero de pequenas equipes. \u00c9 poss\u00edvel melhorar as previs\u00f5es de transi\u00e7\u00f5es, o conjunto de instru\u00e7\u00f5es, a arquitetura, otimizar, usar ferramentas de design mais avan\u00e7adas e melhores bibliotecas. O n\u00famero de diferentes pontos de aplica\u00e7\u00e3o, onde h\u00e1 espa\u00e7o para inova\u00e7\u00f5es, \u00e9 realmente muito, muito grande\u00bb.<\/p>\n

\"Jim<\/p>\n

Os planos p\u00fablicos atuais da Intel incluem duas itera\u00e7\u00f5es de aprimoramento da microarquitetura ap\u00f3s o Sunny Cove. No pr\u00f3ximo design, Willow Cove, como prometido, mudan\u00e7as no subsistema de cache e a transi\u00e7\u00e3o para uma nova tecnologia semicondutora (provavelmente 7 nm) est\u00e3o previstas. Em seguida, no Golden Cove, haver\u00e1 um aumento no desempenho de thread \u00fanico e um foco no trabalho com tarefas de intelig\u00eancia artificial, juntamente com otimiza\u00e7\u00f5es necess\u00e1rias para melhor desempenho em redes de quinta gera\u00e7\u00e3o. \u00c9 poss\u00edvel que em sua apresenta\u00e7\u00e3o Jim Keller estivesse se referindo ao Golden Cove, embora nada tenha sido dito especificamente sobre isso.<\/p>\n

<\/p>\n

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Fonte: 3dnews.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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