{"id":77492,"date":"2020-04-10T19:42:45","date_gmt":"2020-04-10T17:42:45","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe"},"modified":"2020-04-10T19:42:45","modified_gmt":"2020-04-10T17:42:45","slug":"poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","status":"publish","type":"post","link":"https:\/\/prohoster.info\/pt\/blog\/news\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","title":{"rendered":"Cuidado, ARM? Novos n\u00facleos de 64 bits da Synopsys ARC triplicar\u00e3o o desempenho","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Poucos sabem que a arquitetura de processador ARC \u00e9 uma das arquiteturas mais utilizadas, ao lado de ARM, MIPS e x86. Desenvolvida na d\u00e9cada de 1980, a arquitetura ARC \u00e9 utilizada em diversos microcontroladores para uma vasta gama de produtos de alta tecnologia, com cerca de 1,5 bilh\u00e3o<\/a><\/noindex> de dispositivos.<\/p>\n

Recentemente, a Synopsys anunciou uma nova gera\u00e7\u00e3o de n\u00facleos de processador ARC de 32 e 64 bits, que prometem aumentar o desempenho em compara\u00e7\u00e3o com seus predecessores em at\u00e9 tr\u00eas vezes, al\u00e9m de permitir a constru\u00e7\u00e3o de sistemas em chip com 12 n\u00facleos. Assim, os novos n\u00facleos permitir\u00e3o \u00e0 Synopsys competir com a ARM em v\u00e1rias novas frentes.<\/p>\n

«Aplicativos integrados, como controladores para unidades de estado s\u00f3lido ou equipamentos de rede, est\u00e3o se tornando cada vez mais complexos, exigindo um aumento significativo de desempenho com consumo de energia e tamanho limitados», disse John Koeter, vice-presidente s\u00eanior de marketing e estrat\u00e9gia de propriedade intelectual da Synopsys. «Com o lan\u00e7amento da nova arquitetura ARCv3 e dos n\u00facleos ARC HS5x e HS6x, os desenvolvedores poder\u00e3o atender \u00e0s crescentes demandas de desempenho de seus SoCs hoje e no futuro».<\/p>\n

\"Cuidado,
\n<\/center><\/p>\n

As novas fam\u00edlias de processadores da Synopsys DesignWare ARC incluem n\u00facleos de 32 bits HS56\/HS57D\/HS58<\/a><\/noindex> e n\u00facleos de 64 bits HS66\/HS68<\/a><\/noindex>. Os rec\u00e9m-anunciados processadores s\u00e3o destinados a uma ampla gama de aplica\u00e7\u00f5es, como controladores para unidades de estado s\u00f3lido (SSD), controladores de rede, pilotos autom\u00e1ticos para ve\u00edculos, sistemas de infoentretenimento para autom\u00f3veis e muitos outros. Levando em conta as crescentes exig\u00eancias de mem\u00f3ria, os ARC HD6x de 64 bits permitir\u00e3o criar sistemas com 4,5 PB de DRAM, enquanto os dispositivos baseados em ARC HD5x ter\u00e3o que se contentar com volumes menores. No entanto, os volumes reais de mem\u00f3ria suportada provavelmente ser\u00e3o determinados pelo sistema operacional utilizado, e as vantagens vis\u00edveis dos CPUs de 64 bits ser\u00e3o um pipeline mais amplo e um arquivo de registradores maior.<\/p>\n

No que diz respeito \u00e0s arquiteturas DesignWare ARC HS5x e DesignWare ARC HS6x, elas suportam o conjunto de instru\u00e7\u00f5es ARCv3, que pode ser expandido com instru\u00e7\u00f5es APEX (ARC Processor EXtensions), caso algum cliente precise de algo espec\u00edfico. Al\u00e9m disso, o ARC HS57D \u00e9 equipado com um processador de sinal digital ARCv3DSP que suporta 150 instru\u00e7\u00f5es. Os novos n\u00facleos t\u00eam uma profundidade de pipeline de 10 est\u00e1gios, podem executar duas instru\u00e7\u00f5es por ciclo e tamb\u00e9m est\u00e3o equipados com um m\u00f3dulo de opera\u00e7\u00f5es de ponto flutuante de 128 bits. Assim, as vers\u00f5es mais avan\u00e7adas dos n\u00facleos suportam cache de segundo n\u00edvel (L2) de at\u00e9 16 MB.<\/p>\n

\"Cuidado,<\/p>\n

Em termos de desempenho, a Synopsys afirma ter 3 DMIPS por MHz em c\u00e1lculos inteiros, al\u00e9m de 5,1 CoreMark por MHz, o que \u00e9 bastante bom para n\u00facleos compactos com consumo de energia m\u00ednimo. Assim, 3 DMIPS por MHz — \u00e9 mais alto do que muitos processadores poderosos. Cortex-A55<\/a><\/noindex>, enquanto 5,1 CoreMark por MHz — \u00e9 superior a qualquer outro. processador ARM para microcontroladores.<\/a><\/noindex><\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\n

Os n\u00facleos de processador Synopsys DesignWare ARC HS5x e HS6x
<\/strong><\/p>\n<\/td>\n<\/tr>\n

<\/td>\nHS5x<\/td>\nHS6x<\/td>\n<\/tr>\n
<\/td>\nHS56<\/td>\nHS57D<\/td>\nHS58<\/td>\nHS66<\/td>\nHS68<\/td>\n<\/tr>\n
Conjunto de instru\u00e7\u00f5es<\/td>\nARCv3<\/td>\n<\/tr>\n
Instru\u00e7\u00f5es APEX<\/td>\nSuportados<\/td>\n<\/tr>\n
Resolu\u00e7\u00e3o<\/td>\n32 bits<\/td>\n64 bits<\/td>\n<\/tr>\n
Instru\u00e7\u00f5es por ciclo<\/td>\n2<\/td>\n<\/tr>\n
Comprimento do pipeline<\/td>\n10 est\u00e1gios<\/td>\n<\/tr>\n
DSP<\/td>\n\u2014<\/td>\nARCv3DSP
150 instru\u00e7\u00f5es<\/td>\n		\u2014<\/td>\n\u2014<\/td>\n\u2014<\/td>\n<\/tr>\n
Precis\u00e3o do FPU<\/td>\nFP16, FP32, FP64<\/td>\n<\/tr>\n
Cluster de processadores<\/td>\n12 n\u00facleos<\/td>\n<\/tr>\n
Aceleradores por cluster<\/td>\n16 aceleradores<\/td>\n<\/tr>\n
L1<\/td>\nCache de instru\u00e7\u00f5es + Cache de dados<\/td>\n<\/tr>\n
L2<\/td>\n\u2014<\/td>\n\u2014<\/td>\n16 MB<\/td>\n\u2014<\/td>\n16 MB<\/td>\n<\/tr>\n
M\u00e1ximo de mem\u00f3ria<\/td>\n64 GB (dependente do SO)<\/td>\n4,5 Petabytes<\/td>\n<\/tr>\n
Frequ\u00eancia (em t\/p 16FFC)<\/td>\n1,8 GHz<\/td>\n<\/tr>\n
DMIPS<\/td>\n5400 DMIPS por n\u00facleo \/ 3 DMIPS por MHz<\/td>\n<\/tr>\n
CoreMark<\/td>\n9180 CoreMark por n\u00facleo \/ 5,1 CoreMark por MHz<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Uma das caracter\u00edsticas-chave da nova fam\u00edlia DesignWare ARC HS5x e DesignWare ARC HS6x \u00e9 a capacidade de criar sistemas em chip (SoC) com 12 n\u00facleos de processador de uso geral e 16 aceleradores especializados. Cada n\u00facleo\/acelerador em tal processador opera em sua pr\u00f3pria frequ\u00eancia de clock e utiliza seu pr\u00f3prio subsistema de alimenta\u00e7\u00e3o para maximizar a efici\u00eancia energ\u00e9tica. Juntamente com os novos n\u00facleos, a Synopsys tamb\u00e9m oferece uma conex\u00e3o de cache coerente interno com uma taxa de transfer\u00eancia de dados de 800 GB\/s. <\/p>\n

SoCs baseados na arquitetura ARC n\u00e3o s\u00e3o muito comuns hoje em dia, mas considerando os processos promissores para sistemas de pilotagem autom\u00e1tica, armazenamento de dados, gerenciamento de fluxo de dados, a multicore e v\u00e1rios tipos de aceleradores s\u00e3o muito bem-vindos. Isso permitir\u00e1 que a Synopsys concorra com os n\u00facleos ARM por um lugar em SoCs para essas aplica\u00e7\u00f5es, algo que n\u00e3o aconteceu at\u00e9 agora. Assim, os n\u00facleos DesignWare ARC HS5x e DesignWare ARC HS6x j\u00e1 despertaram o interesse do fabricante de SSDs Starblaze. <\/p>\n

«Desenvolvedores de solu\u00e7\u00f5es integradas de alto desempenho enfrentam constantemente novos desafios na busca por alto desempenho ao utilizar grandes volumes de mem\u00f3ria e restri\u00e7\u00f5es de consumo de energia e tamanho», disse Bruce Cheng, chefe de tecnologia da Starblaze. «As capacidades dos novos processadores ARC HS5x de 32 bits e HS6x de 64 bits da Synopsys em termos de multicores nos permitir\u00e3o atingir um novo n\u00edvel de efici\u00eancia energ\u00e9tica que n\u00e3o \u00e9 oferecido por outros processadores dispon\u00edveis no mercado atualmente».<\/p>\n

\"Cuidado,<\/p>\n

A Synopsys come\u00e7ar\u00e1 a oferecer n\u00facleos ARC HS56, HS57D, HS58, HS66, HS68, bem como suas vers\u00f5es multiprocessadas HS56MP, HS57DMP, HS58MP, HS66MP, HS68MP, a partir do terceiro trimestre de 2020. Al\u00e9m disso, a empresa oferecer\u00e1 o pacote ARC MetaWare Development Toolkit para cria\u00e7\u00e3o de chips baseados nesses n\u00facleos, al\u00e9m de um simulador e um verificador para checar a funcionalidade da SoC antes de sua implementa\u00e7\u00e3o em sil\u00edcio. Quanto ao suporte de sistemas operacionais, os novos n\u00facleos ser\u00e3o compat\u00edveis com v\u00e1rias distribui\u00e7\u00f5es do Linux, Zephyr e um variedade de sistemas operacionais propriet\u00e1rios.<\/p>\n

<\/p>\n

<\/center><\/p>\n

\t\t\t\t


\n\t\t\t\t\t\t\t\t<\/center>
Fonte: 3dnews.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

\u041d\u0435\u043c\u043d\u043e\u0433\u0438\u0435 \u0437\u043d\u0430\u044e\u0442, \u0447\u0442\u043e \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u0430\u044f \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0430 ARC \u044f\u0432\u043b\u044f\u0435\u0442\u0441\u044f \u043e\u0434\u043d\u043e\u0439 \u0438\u0437 \u0441\u0430\u043c\u044b\u0445 \u0440\u0430\u0441\u043f\u0440\u043e\u0441\u0442\u0440\u0430\u043d\u0435\u043d\u043d\u044b\u0445 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440 \u043d\u0430\u0440\u044f\u0434\u0443 \u0441 ARM, MIPS \u0438 x86. \u0420\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0430\u043d\u043d\u0430\u044f \u0432 1980-\u0445 \u0433\u043e\u0434\u0430\u0445, \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0430 ARC \u043f\u0440\u0438\u043c\u0435\u043d\u044f\u0435\u0442\u0441\u044f \u0432 \u0440\u0430\u0437\u043b\u0438\u0447\u043d\u044b\u0445 \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u0430\u0445 \u0434\u043b\u044f \u0448\u0438\u0440\u043e\u0447\u0430\u0439\u0448\u0435\u0433\u043e \u0441\u043f\u0435\u043a\u0442\u0440\u0430 \u0432\u044b\u0441\u043e\u043a\u043e\u0442\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0447\u043d\u043e\u0439 \u043f\u0440\u043e\u0434\u0443\u043a\u0446\u0438\u0438, \u0430 \u043a\u0430\u0436\u0434\u044b\u0439 \u0433\u043e\u0434 \u043d\u0430 \u043e\u0441\u043d\u043e\u0432\u0435 ARC \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0441\u044f \u043e\u043a\u043e\u043b\u043e 1,5 \u043c\u0438\u043b\u043b\u0438\u0430\u0440\u0434\u0430 \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432. \u041d\u0430 \u0434\u043d\u044f\u0445 \u043a\u043e\u0440\u043f\u043e\u0440\u0430\u0446\u0438\u044f Synopsys \u0430\u043d\u043e\u043d\u0441\u0438\u0440\u043e\u0432\u0430\u043b\u0430 \u043d\u043e\u0432\u043e\u0435 \u043f\u043e\u043a\u043e\u043b\u0435\u043d\u0438\u0435 32- \u0438 64-\u0440\u0430\u0437\u0440\u044f\u0434\u043d\u044b\u0445 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u044b\u0445 […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":77493,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-77492","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Cuidado, ARM? Os novos n\u00facleos de 64 bits da Synopsys ARC aumentar\u00e3o o desempenho em tr\u00eas vezes | ProHoster","description":"Poucos sabem que a arquitetura de processador ARC \u00e9 uma das arquiteturas mais populares, ao lado de ARM, MIPS e x86.","canonical_url":"https:\/\/prohoster.info\/pt\/blog\/news\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","robots":"max-image-preview:large","keywords":"","webmasterTools":{"miscellaneous":""},"schema":null,"og:locale":"pt_PT","og:site_name":"ProHoster | \u041a\u0443\u043f\u0438\u0442\u044c \u043d\u0430\u0434\u0435\u0436\u043d\u044b\u0439 \u0445\u043e\u0441\u0442\u0438\u043d\u0433 \u0434\u043b\u044f \u0441\u0430\u0439\u0442\u043e\u0432 \u0441 \u0437\u0430\u0449\u0438\u0442\u043e\u0439 \u043e\u0442 DDoS, VPS VDS \u0441\u0435\u0440\u0432\u0435\u0440\u044b","og:type":"article","og:title":"\ud83e\udd47\u041f\u043e\u0431\u0435\u0440\u0435\u0433\u0438\u0441\u044c, ARM? \u041d\u043e\u0432\u044b\u0435 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