{"id":111945,"date":"2023-12-03T15:10:13","date_gmt":"2023-12-03T13:10:13","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/vypusk-coreboot-4-22"},"modified":"2023-12-03T15:10:13","modified_gmt":"2023-12-03T13:10:13","slug":"vypusk-coreboot-4-22","status":"publish","type":"post","link":"https:\/\/prohoster.info\/ro\/blog\/news\/vypusk-coreboot-4-22","title":{"rendered":"Lansarea Coreboot 4.22","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Este disponibil\u0103 lansarea proiectului CoreBoot 4.22, \u00een cadrul c\u0103ruia se dezvolt\u0103 o alternativ\u0103 liber\u0103 la firmware-urile \u0219i BIOS-urile proprietare. Codul proiectului este distribuit sub licen\u021ba GPLv2. La crearea noii versiuni au participat 135 de dezvoltatori, care au preg\u0103tit 977 de modific\u0103ri. Se men\u021bioneaz\u0103 c\u0103 \u00eencep\u00e2nd cu urm\u0103toarea lansare, proiectul va trece la un nou sistem de denumire a versiunilor, folosind leg\u0103tura cu data (an.lun\u0103.actualizare), de exemplu, \u00een februarie 2024, \u00een loc de versiunea 4.23 va fi generat\u0103 lansarea 24.02.00.      <\/p>\n<p>Modific\u0103ri principale:   <\/p>\n<ul>\n<li class=\"l\"> A fost ad\u0103ugat\u0103 o implementare ini\u021bial\u0103 a platformei AMD openSIL (Open-Source Silicon Initialization Library), care dezvolt\u0103 componente pentru simplificarea cre\u0103rii firmware-urilor.\n<li class=\"l\"> A fost ad\u0103ugat\u0103 suport pentru 17 pl\u0103ci de baz\u0103. 11 dintre pl\u0103cile ad\u0103ugate sunt utilizate pe dispozitive cu Chrome OS sau pe <a class=\"wpil_keyword_link\" href=\"https:\/\/prohoster.info\/ro\/server\/dts-gdansk\/\"   title=\"servere\" data-wpil-keyword-link=\"linked\"  data-wpil-monitor-id=\"4549\">servere<\/a> Google. Pl\u0103ci care nu sunt legate de Google:\n<ul>\n<li class=\"l\"> AMD Onyx\n<li class=\"l\"> Intel Meteorlake-P RVP\n<li class=\"l\"> Purism Librem 11\n<li class=\"l\"> Purism Librem L1UM v2\n<li class=\"l\"> Siemens FA EHL\n<li class=\"l\"> Supermicro X11SSW-F  <\/ul>\n<li class=\"l\"> A fost ad\u0103ugat suport pentru SoC AMD Genoa.\n<li class=\"l\"> Pe arhitectura x86, \u00een etapele anterioare ini\u021bializ\u0103rii memoriei, a fost implementat suport pentru sec\u021biunea <data>, permi\u021b\u00e2nd utilizarea defini\u021biilor variabilelor globale \u00een codul C. \u00cen etapa blocului de \u00eenc\u0103rcare, datele sunt ata\u0219ate imediat dup\u0103 cod \u0219i apoi sunt plasate \u00een memorie cache, folosind conceptul Cache-As-RAM (VMA).\n<li class=\"l\"> Pentru sistemele x86, \u00een etapa ramstage \u0219i \u00een etapele anterioare ini\u021bializ\u0103rii memoriei, a fost implementat suportul pentru cache-ul sistemului de fi\u0219iere CBFS, utilizat pentru plasarea componentelor Coreboot pe Flash. Cache-ul CBFS permite desf\u0103\u0219urarea fi\u0219ierelor CBFS, folosind func\u021bia cbfs_map() f\u0103r\u0103 a rezerva o zon\u0103 separat\u0103 de memorie pentru fi\u0219ier. Pentru configurarea dimensiunii cache-ului, au fost propuse parametrii PRERAM_CBFS_CACHE_SIZE \u0219i RAMSTAGE_CBFS_CACHE_SIZE.\n<li class=\"l\"> A fost ad\u0103ugat\u0103 posibilitatea \u00eencorpor\u0103rii romstage \u00een blocul de boot (bootblock). Furnizarea romstage ca parte a blocului de boot permite reducerea dimensiunii codului cu 10-20 de mii de linii. Dintre situa\u021biile \u00een care poate fi necesar\u0103 o furnizare separat\u0103 de romstage, se men\u021bioneaz\u0103 configura\u021biile cu vboot sau modul de fallback, precum \u0219i dispozitivele cu dimensiuni limitate ale blocului de boot (Intel APL 32K) sau suporturi de boot prea lente (unele SoC ARM).\n<li class=\"l\"> \u00cen gfx a fost ad\u0103ugat un API pentru determinarea prezen\u021bei unui ecran extern pe dispozitivele cu cipuri Intel.\n<li class=\"l\"> \u00cen pci_rom a fost implementat\u0103 posibilitatea ad\u0103ug\u0103rii unei sume de control pentru VBIOS la completarea tabelului VFCT. O astfel de sum\u0103 de control este verificat\u0103 de unele drivere AMD pentru Windows.\n<li class=\"l\"> Au fost ad\u0103ugate modific\u0103ri care permit rularea Windows pe anumite dispozitive Chromebook cu Coreboot.\n<li class=\"l\"> A fost implementat\u0103 generarea tabelului ACPI pentru dispozitive bazate pe arhitectura ARM64.\n<li class=\"l\"> Compatibilitatea cu specifica\u021biile ACPI a fost \u00eembun\u0103t\u0103\u021bit\u0103.\n<li class=\"l\"> Set\u0103rile MRC (Memory Reference Code) pentru pl\u0103cile SNB+MRC au fost mutate \u00een structura DeviceTree.\n<li class=\"l\"> Componentelor payload bazate pe U-Boot \u0219i edk2 au fost actualizate.\n<li class=\"l\"> Instrumentele utilizate au fost actualizate: GMP 6.3.0, binutils 2.41 \u0219i MPFR 4.2.1.\n<li class=\"l\"> Ramura principal\u0103 din repository-ul Git a fost redenumit\u0103 din  \u00een <main>.  <\/ul>\n<p>Sursa: <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=60224\">opennet.ro<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u0414\u043e\u0441\u0442\u0443\u043f\u0435\u043d \u0440\u0435\u043b\u0438\u0437 \u043f\u0440\u043e\u0435\u043a\u0442\u0430 CoreBoot 4.22, \u0432 \u0440\u0430\u043c\u043a\u0430\u0445 \u043a\u043e\u0442\u043e\u0440\u043e\u0433\u043e \u0440\u0430\u0437\u0440\u0430\u0431\u0430\u0442\u044b\u0432\u0430\u0435\u0442\u0441\u044f \u0441\u0432\u043e\u0431\u043e\u0434\u043d\u0430\u044f \u0430\u043b\u044c\u0442\u0435\u0440\u043d\u0430\u0442\u0438\u0432\u0430 \u043f\u0440\u043e\u043f\u0440\u0438\u0435\u0442\u0430\u0440\u043d\u044b\u043c \u043f\u0440\u043e\u0448\u0438\u0432\u043a\u0430\u043c \u0438 BIOS. \u041a\u043e\u0434 \u043f\u0440\u043e\u0435\u043a\u0442\u0430 \u0440\u0430\u0441\u043f\u0440\u043e\u0441\u0442\u0440\u0430\u043d\u044f\u0435\u0442\u0441\u044f \u043f\u043e\u0434 \u043b\u0438\u0446\u0435\u043d\u0437\u0438\u0435\u0439 GPLv2. \u0412 \u0441\u043e\u0437\u0434\u0430\u043d\u0438\u0438 \u043d\u043e\u0432\u043e\u0439 \u0432\u0435\u0440\u0441\u0438\u0438 \u043f\u0440\u0438\u043d\u044f\u043b\u043e \u0443\u0447\u0430\u0441\u0442\u0438\u0435 135 \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u043e\u0432, \u043a\u043e\u0442\u043e\u0440\u044b\u0435 \u043f\u043e\u0434\u0433\u043e\u0442\u043e\u0432\u0438\u043b\u0438 977 \u0438\u0437\u043c\u0435\u043d\u0435\u043d\u0438\u0439. \u041e\u0442\u043c\u0435\u0447\u0430\u0435\u0442\u0441\u044f, \u0447\u0442\u043e \u043d\u0430\u0447\u0438\u043d\u0430\u044f \u0441\u043e \u0441\u043b\u0435\u0434\u0443\u044e\u0449\u0435\u0433\u043e \u0432\u044b\u043f\u0443\u0441\u043a\u0430 \u043f\u0440\u043e\u0435\u043a\u0442 \u043f\u0435\u0440\u0435\u0439\u0434\u0451\u0442 \u043d\u0430 \u043d\u043e\u0432\u0443\u044e \u0441\u0445\u0435\u043c\u0443 \u043d\u0430\u0438\u043c\u0435\u043d\u043e\u0432\u0430\u043d\u0438\u044f \u0432\u0435\u0440\u0441\u0438\u0439, \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044e\u0449\u0443\u044e \u043f\u0440\u0438\u0432\u044f\u0437\u043a\u0443 \u043a \u0434\u0430\u0442\u0435 (\u0433\u043e\u0434.\u043c\u0435\u0441\u044f\u0446.\u043e\u0431\u043d\u043e\u0432\u043b\u0435\u043d\u0438\u0435), \u043d\u0430\u043f\u0440\u0438\u043c\u0435\u0440, \u0432 \u0444\u0435\u0432\u0440\u0430\u043b\u0435 2024 [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-111945","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.2.1 - 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