{"id":30179,"date":"2019-10-31T21:34:00","date_gmt":"2019-10-31T18:34:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/asic-dlya-mashinnogo-obucheniya-dolzhny-proektirovatsya-avtomaticheski\/"},"modified":"2019-10-31T21:34:00","modified_gmt":"2019-10-31T18:34:00","slug":"asic-dlya-mashinnogo-obucheniya-dolzhny-proektirovatsya-avtomaticheski","status":"publish","type":"post","link":"https:\/\/prohoster.info\/ro\/blog\/asic-dlya-mashinnogo-obucheniya-dolzhny-proektirovatsya-avtomaticheski","title":{"rendered":"ASIC-urile pentru \u00eenv\u0103\u021barea automat\u0103 trebuie s\u0103 fie proiectate automat","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

Pu\u021bini ar contesta c\u0103 proiectarea ASIC-urilor personalizate nu este un proces simplu \u0219i rapid. Totu\u0219i, vrem \u0219i avem nevoie ca lucrurile s\u0103 decurg\u0103 mai repede: ast\u0103zi prime\u0219ti algoritmul, iar peste o s\u0103pt\u0103m\u00e2n\u0103 ai un proiect digital finalizat. Problema este c\u0103 ASIC-urile extrem de specializate sunt aproape produse unicat. Rareori sunt necesare \u00een loturi de milioane, pentru care se pot cheltui c\u00e2t mai multe resurse financiare \u0219i umane, dac\u0103 este nevoie s\u0103 fie realizate \u00eentr-un timp scurt. ASIC-urile specializate, \u0219i deci cele mai eficiente pentru rezolvarea sarcinilor lor, ar trebui s\u0103 fie mai ieftine \u00een dezvoltare, ceea ce devine extrem de important \u00een etapa actual\u0103 de dezvoltare a \u00eenv\u0103\u021b\u0103rii automate. Pe acest front, nu mai este suficient bagajul acumulat de pia\u021ba computa\u021bional\u0103 \u0219i, \u00een special, progresele GPU-urilor \u00een direc\u021bia \u00eenv\u0103\u021b\u0103rii automate (ML).<\/p>\n

\"ASIC-urile<\/p>\n

Pentru a accelera proiectarea ASIC-urilor pentru sarcinile ML, agen\u021bia DARPA lanseaz\u0103 un nou program \u2013 Real Time Machine Learning (RTML). Programul de \u00eenv\u0103\u021bare automat\u0103 \u00een timp real prevede dezvoltarea unui compilator sau a unei platforme software care s\u0103 poat\u0103 proiecta automat arhitectura cipului pentru un anumit cadru ML. Platforma trebuie s\u0103 analizeze automat algoritmul propus pentru \u00eenv\u0103\u021barea automat\u0103 \u0219i setul de date pentru acest algoritm, dup\u0103 care \u00een limbajul Verilog trebuie s\u0103 genereze cod pentru crearea unui ASIC specializat. Speciali\u0219tii \u00een dezvoltarea algoritmilor ML nu au cuno\u0219tin\u021bele proiectan\u021bilor de cipuri, iar proiectan\u021bii rar sunt familiariza\u021bi cu principiile \u00eenv\u0103\u021b\u0103rii automate. Programul RTML trebuie s\u0103 contribuie la integrarea avantajelor ambelor p\u0103r\u021bi \u00eentr-o platform\u0103 automatizat\u0103 pentru dezvoltarea ASIC-urilor pentru \u00eenv\u0103\u021barea automat\u0103.<\/p>\n

\u00cen timpul ciclului de via\u021b\u0103 al programului RTML, solu\u021biile g\u0103site vor trebui s\u0103 fie testate \u00een dou\u0103 principale domenii de aplicare: func\u021bionarea \u00een re\u021bele 5G \u0219i procesarea imaginilor. De asemenea, programul RTML \u0219i platformele software create pentru proiectarea automat\u0103 a acceleratoarelor ML vor fi utilizate pentru dezvoltarea \u0219i testarea de noi algoritmi ML \u0219i seturi de date. Astfel, chiar \u00eenainte de proiectarea \"siliconului\", vor putea fi evaluate perspectivele noilor cadre. Partenerul DARPA \u00een programul RTML va fi Fondul Na\u021bional de \u0218tiin\u021b\u0103 (NSF), care se ocup\u0103 \u0219i cu problemele \u00eenv\u0103\u021b\u0103rii automate \u0219i dezvoltarea algoritmilor ML. Compilatorul dezvoltat va fi predat la NSF, iar \u00eentoarcerea c\u0103tre DARPA se a\u0219teapt\u0103 s\u0103 fie compilatorul \u0219i platforma pentru proiectarea algoritmilor ML. \u00cen viitor, proiectarea hardware-ului \u0219i crearea algoritmilor vor fi o solu\u021bie complex\u0103, ceea ce va duce la apari\u021bia sistemelor ma\u0219inale care \u00eenva\u021b\u0103 \u00een timp real.<\/p>\n

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Sursa: 3dnews.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

\u0412\u0440\u044f\u0434 \u043b\u0438 \u043a\u0442\u043e-\u0442\u043e \u0431\u0443\u0434\u0435\u0442 \u0441\u043f\u043e\u0440\u0438\u0442\u044c \u0441 \u0442\u0435\u043c, \u0447\u0442\u043e \u043f\u0440\u043e\u0435\u043a\u0442\u0438\u0440\u043e\u0432\u0430\u043d\u0438\u0435 \u0437\u0430\u043a\u0430\u0437\u043d\u044b\u0445 \u0411\u0418\u0421 (ASIC) \u2015 \u044d\u0442\u043e \u0434\u0430\u043b\u0435\u043a\u043e \u043d\u0435 \u043f\u0440\u043e\u0441\u0442\u043e\u0439 \u0438 \u043d\u0435 \u0431\u044b\u0441\u0442\u0440\u044b\u0439 \u043f\u0440\u043e\u0446\u0435\u0441\u0441. \u0410 \u0432\u0435\u0434\u044c \u0445\u043e\u0447\u0435\u0442\u0441\u044f \u0438 \u043d\u0443\u0436\u043d\u043e, \u0447\u0442\u043e\u0431\u044b \u0431\u044b\u043b\u043e \u0431\u044b\u0441\u0442\u0440\u0435\u0435: \u0441\u0435\u0433\u043e\u0434\u043d\u044f \u0432\u044b\u0434\u0430\u043b \u0430\u043b\u0433\u043e\u0440\u0438\u0442\u043c, \u0430 \u0447\u0435\u0440\u0435\u0437 \u043d\u0435\u0434\u0435\u043b\u044e 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