{"id":55763,"date":"2020-01-28T00:00:00","date_gmt":"2020-01-27T21:00:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/blog_prohoster\/l1des-cacheout-i-vrs-novye-uyazvimosti-v-mikroarhitekturnyh-strukturah-cpu-intel"},"modified":"2020-02-18T14:03:54","modified_gmt":"2020-02-18T11:03:54","slug":"l1des-cacheout-i-vrs-novye-uyazvimosti-v-mikroarhitekturnyh-strukturah-cpu-intel","status":"publish","type":"post","link":"https:\/\/prohoster.info\/sk\/blog\/news\/l1des-cacheout-i-vrs-novye-uyazvimosti-v-mikroarhitekturnyh-strukturah-cpu-intel","title":{"rendered":"L1DES (CacheOut) a VRS \u2014 nov\u00e9 zranite\u013enosti v mikroarchitektonick\u00fdch \u0161trukt\u00farach CPU Intel","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>Spolo\u010dnos\u0165 Intel <noindex><a rel=\"nofollow\" href=\"https:\/\/blogs.intel.com\/technology\/2020\/01\/ipas-intel-sa-00329\/\">odhalila<\/a><\/noindex> inform\u00e1cie o dvoch nov\u00fdch zranite\u013enostiach v CPU Intel, sp\u00f4soben\u00fdch \u00fanikom \u00fadajov z L1D cache (<noindex><a rel=\"nofollow\" href=\"https:\/\/software.intel.com\/security-software-guidance\/software-guidance\/l1d-eviction-sampling\">CVE-2020-0549<\/a><\/noindex>, L1DES \u2014 L1D Eviction Sampling) a vektorov\u00fdch registrov (<noindex><a rel=\"nofollow\" href=\"https:\/\/software.intel.com\/security-software-guidance\/software-guidance\/vector-register-sampling\">CVE-2020-0548<\/a><\/noindex>, VRS \u2014 Vector Register Sampling). Zranite\u013enosti patria do triedy <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=50684\">MDS<\/a><\/noindex> (Microarchitectural Data Sampling) a s\u00fa zalo\u017een\u00e9 na pou\u017eit\u00ed met\u00f3d anal\u00fdzy cez bo\u010dn\u00e9 kan\u00e1ly na \u00fadaje v mikroarchitektonick\u00fdch \u0161trukt\u00farach. AMD, ARM a \u010fal\u0161ie procesory nie s\u00fa postihnut\u00e9 t\u00fdmito probl\u00e9mami.<\/p>\n<p>Najv\u00e4\u010d\u0161ie nebezpe\u010denstvo predstavuje zranite\u013enos\u0165 L1DES, ktor\u00e1  <noindex><a rel=\"nofollow\" href=\"https:\/\/access.redhat.com\/solutions\/l1d-cache-eviction-and-vector-register-sampling\">umo\u017e\u0148uje<\/a><\/noindex> uchov\u00e1vanie blokov vyrovnan\u00fdch \u00fadajov (cache line), ktor\u00e9 s\u00fa vytl\u00e1\u010dan\u00e9 z prvej \u00farovne cache (L1D), do vypl\u0148ovacieho buffera (Fill Buffer), ktor\u00fd by mal by\u0165 v tomto momente pr\u00e1zdny. Na ur\u010denie \u00fadajov uchov\u00e1van\u00fdch vo vypl\u0148ovacom buffere s\u00fa pou\u017eite\u013en\u00e9 met\u00f3dy anal\u00fdzy cez bo\u010dn\u00e9 kan\u00e1ly, ktor\u00e9 boli predt\u00fdm navrhnut\u00e9 v \u00fatokoch <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=50684\">MDS<\/a><\/noindex> (Microarchitectural Data Sampling) a <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=51852\">TAA<\/a><\/noindex> (Transactional Asynchronous Abort). Podstata predt\u00fdm implementovanej ochrany proti<br \/>\nMDS a TAA spo\u010d\u00edva v vymazan\u00ed mikroarchitektonick\u00fdch bufferov pred prepn\u00fa\u0165\u00edm kontextu, no, ako sa uk\u00e1zalo, za ur\u010dit\u00fdch podmienok s\u00fa d\u00e1ta spekulat\u00edvne zresetovan\u00e9 do bufferov po oper\u00e1cii vymazania, tak\u017ee met\u00f3dy MDS a TAA zost\u00e1vaj\u00fa pou\u017eite\u013en\u00e9.<\/p>\n<p><center><img decoding=\"async\" alt=\"L1DES (CacheOut) a VRS - nov\u00e9 zranite\u013enosti v mikroarchitektonick\u00fdch \u0161trukt\u00farach CPU Intel\" src=\"\/wp-content\/uploads\/2020\/01\/0a5f61b0703517504135e27e32c762bc.jpg\" style=\"display:block;margin: 0 auto;\" \/><\/center><\/p>\n<p>V d\u00f4sledku toho m\u00f4\u017ee \u00fato\u010dn\u00edk dosiahnu\u0165 ur\u010denie \u00fadajov vytla\u010den\u00fdch z prvej \u00farovne cache, ktor\u00e9 boli zmenen\u00e9 po\u010das vykon\u00e1vania aplik\u00e1cie, ktor\u00e1 predt\u00fdm vyu\u017e\u00edvala aktu\u00e1lne CPU jadro, alebo aplik\u00e1ci\u00ed, ktor\u00e9 sa paralelne vykon\u00e1vaj\u00fa v in\u00fdch logick\u00fdch tokoch (hyperthread) na tom istom CPU jadre (vypnutie HyperThreadingu zni\u017euje efekt\u00edvnos\u0165 \u00fatoku). Na rozdiel od \u00fatoku <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=49134\">L1TF<\/a><\/noindex>, L1DES neumo\u017e\u0148uje vybera\u0165 konkr\u00e9tne fyzick\u00e9 adresy na overenie, ale pon\u00faka mo\u017enos\u0165 pas\u00edvne sledova\u0165 aktivitu v in\u00fdch logick\u00fdch tokoch souvisej\u00facich s na\u010d\u00edtan\u00edm alebo ulo\u017een\u00edm hodn\u00f4t do pam\u00e4te.<\/p>\n<p>Na z\u00e1klade L1DES vyvinuli r\u00f4zne t\u00edmy v\u00fdskumn\u00edkov nieko\u013eko variantov \u00fatokov, ktor\u00e9 potenci\u00e1lne umo\u017e\u0148uj\u00fa extrakciu d\u00f4vern\u00fdch inform\u00e1ci\u00ed z in\u00fdch procesov, opera\u010dn\u00e9ho syst\u00e9mu, virtu\u00e1lnych strojov a chr\u00e1nen\u00fdch enkl\u00e1v SGX. <\/p>\n<ul>\n<li class=\"l\"> T\u00edm VUSec <noindex><a rel=\"nofollow\" href=\"https:\/\/mdsattacks.com\/#ridl-nng\">prisp\u00f4sobil<\/a><\/noindex> met\u00f3du \u00fatoku RIDL pre zranite\u013enos\u0165 L1DES. K dispoz\u00edcii je <noindex><a rel=\"nofollow\" href=\"https:\/\/github.com\/vusec\/ridl\/blob\/master\/pocs\/verw_bypass_l1des.c\">prototyp exploit<\/a><\/noindex>, ktor\u00fd okrem in\u00e9ho obch\u00e1dza navrhnut\u00fa met\u00f3du ochrany od Intelu proti MDS, zalo\u017een\u00fa na pou\u017eit\u00ed in\u0161trukcie VERW na vy\u010distenie obsahu mikroarchitektonick\u00fdch bufferov v okamihu n\u00e1vratu z jadra do u\u017e\u00edvate\u013esk\u00e9ho priestoru alebo pri prenose kontroly na hostite\u013esk\u00fd syst\u00e9m (v\u00fdskumn\u00edci p\u00f4vodne trvali na tom, \u017ee VERW (vy\u010distenie mikroarchitektonick\u00fdch bufferov) na ochranu nesta\u010d\u00ed a vy\u017eaduje sa \u00fapln\u00e9 vymazanie L1 cache pri ka\u017edom prep\u00ednan\u00ed kontextu).\n<li class=\"l\"> T\u00edm <noindex><a rel=\"nofollow\" href=\"https:\/\/zombieloadattack.com\/\">ZombieLoad<\/a><\/noindex>  aktualizoval svoju <noindex><a rel=\"nofollow\" href=\"https:\/\/zombieloadattack.com\/zombieload.pdf\">met\u00f3du \u00fatoku<\/a><\/noindex> so zoh\u013eadnen\u00edm zranite\u013enosti L1DES.\n<li class=\"l\"> V\u00fdskumn\u00edci z Michiganskej univerzity vyvinuli vlastn\u00fa met\u00f3du \u00fatoku <noindex><a rel=\"nofollow\" href=\"https:\/\/cacheoutattack.com\/\">CacheOut<\/a><\/noindex> (<noindex><a rel=\"nofollow\" href=\"https:\/\/cacheoutattack.com\/CacheOut.pdf\">PDF<\/a><\/noindex>), ktor\u00e1 umo\u017e\u0148uje extrahova\u0165 d\u00f4vern\u00e9 inform\u00e1cie z jadra opera\u010dn\u00e9ho syst\u00e9mu, virtu\u00e1lnych strojov a zabezpe\u010den\u00fdch enkl\u00e1v SGX. Met\u00f3da sa zaklad\u00e1 na <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=51852\">manipul\u00e1ci\u00e1ch<\/a><\/noindex> s mechanizmom asynchr\u00f3nneho preru\u0161enia oper\u00e1ci\u00ed (TAA, TSX Asynchronous Abort) na ur\u010denie obsahu bufferu zaplnenia po \u00faniku \u00fadajov z L1D cache.\n<p><center><noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/pics_base\/0_1580195677.png\"><img decoding=\"async\" alt=\"L1DES (CacheOut) a VRS - nov\u00e9 zranite\u013enosti v mikroarchitektonick\u00fdch \u0161trukt\u00farach CPU Intel\" src=\"\/wp-content\/uploads\/2020\/01\/68cf9a4cf24206c7d226e0f69b8cad55.jpg\" style=\"display:block;margin: 0 auto;\" \/><\/a><\/noindex><\/center><\/p>\n<\/ul>\n<p>Druh\u00e1 zranite\u013enos\u0165 VRS (Vector Register Sampling) <noindex><a rel=\"nofollow\" href=\"https:\/\/software.intel.com\/security-software-guidance\/software-guidance\/vector-register-sampling\">s\u00favis\u00ed<\/a><\/noindex> s \u00fanikom do bufferu ulo\u017eenia (Store Buffer) v\u00fdsledkov oper\u00e1ci\u00ed \u010d\u00edtania z vektorov\u00fdch registrov, ktor\u00e9 boli zmenen\u00e9 po\u010das vykon\u00e1vania vektorov\u00fdch in\u0161trukci\u00ed (SSE, AVX, AVX-512) na tom istom CPU jadre. \u00danik nast\u00e1va pri dostato\u010dne zriedkavej zhode okolnost\u00ed a je sp\u00f4soben\u00fd t\u00fdm, \u017ee \u0161pekulat\u00edvne vykon\u00e1van\u00e1 oper\u00e1cia, ktor\u00e1 vedie k odrazu stavu vektorov\u00fdch registrov v bufferi ulo\u017eenia, me\u0161k\u00e1 a kon\u010d\u00ed po vy\u010disten\u00ed bufferu, a nie pred n\u00edm. Podobne ako so zranite\u013enos\u0165ou L1DES, obsah bufferu ulo\u017eenia m\u00f4\u017ee by\u0165 n\u00e1sledne ur\u010den\u00fd pomocou met\u00f3d \u00fatokov MDS a TAA.  <\/p>\n<p>V\u00fdskumn\u00edci z skupiny VUSec <noindex><a rel=\"nofollow\" href=\"https:\/\/mdsattacks.com\/#ridl-nng\">pripravili<\/a><\/noindex> <noindex><a rel=\"nofollow\" href=\"https:\/\/github.com\/vusec\/ridl\/blob\/master\/pocs\/vrs.c\">prototyp exploit<\/a><\/noindex>, ktor\u00fd umo\u017e\u0148uje ur\u010di\u0165 hodnoty vektorov\u00fdch registrov z\u00edskan\u00fdch v d\u00f4sledku v\u00fdpo\u010dtov v inom logickom vl\u00e1kne toho ist\u00e9ho CPU jadra. Spolo\u010dnos\u0165 Intel <noindex><a rel=\"nofollow\" href=\"https:\/\/software.intel.com\/security-software-guidance\/software-guidance\/vector-register-sampling\">ohodnotila<\/a><\/noindex> zranite\u013enos\u0165 VRS ako pr\u00edli\u0161 zlo\u017eit\u00fa na uskuto\u010dnenie re\u00e1lnych \u00fatokov a pridelila minim\u00e1lnu \u00farove\u0148 nebezpe\u010denstva (2.8 CVSS).<\/p>\n<p>Inform\u00e1cie o probl\u00e9moch boli odovzdan\u00e9 spolo\u010dnosti Intel v m\u00e1ji 2019 t\u00edmom Zombieload z Grazu (Rak\u00fasko) a skupinou VUSec z Amsterdamskej slobodnej univerzity, a nesk\u00f4r, po anal\u00fdze \u010fal\u0161\u00edch vektorov \u00fatoku MDS, boli zranite\u013enosti potvrden\u00e9 niektor\u00fdmi \u010fal\u0161\u00edmi v\u00fdskumn\u00edkmi. Do prvej spr\u00e1vy MDS neboli zahrnut\u00e9 inform\u00e1cie o probl\u00e9moch L1DES a VRS kv\u00f4li nedostatku opravy. Oprava nie je k dispoz\u00edcii ani teraz, ale dohodnut\u00e9 lehoty na nezverejnenie vypr\u0161ali.<br \/>\nAko obch\u00e1dzaj\u00face met\u00f3dy ochrany sa odpor\u00fa\u010da vypn\u00fa\u0165 HyperThreading. Na zablokovanie zranite\u013enosti na strane jadra sa navrhuje vypr\u00e1zdni\u0165 cache L1 pri ka\u017edom prepnut\u00ed kontextu (MSR bit MSR_IA32_FLUSH_CMD) a vypn\u00fa\u0165 roz\u0161\u00edrenie TSX (MSR bity MSR_IA32_TSX_CTRL a MSR_TSX_FORCE_ABORT).<\/p>\n<p>Intel <noindex><a rel=\"nofollow\" href=\"https:\/\/blogs.intel.com\/technology\/2020\/01\/ipas-intel-sa-00329\/\">s\u013eubuje<\/a><\/noindex> uvo\u013eni\u0165 aktualiz\u00e1ciu mikrocode s implement\u00e1ciou mechanizmov na blokovanie probl\u00e9mov v bl\u00edzkej dobe. Intel tie\u017e uv\u00e1dza, \u017ee pou\u017eitie navrhnut\u00fdch met\u00f3d ochrany proti \u00fatoku <noindex><a rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=49134\">L1TF<\/a><\/noindex> (L1 Terminal Fault) umo\u017e\u0148uje blokova\u0165 zneu\u017e\u00edvanie zranite\u013enosti L1DES z virtu\u00e1lnych prostred\u00ed. \u00datoku <noindex><a rel=\"nofollow\" href=\"https:\/\/software.intel.com\/security-software-guidance\/insights\/processors-affected-l1d-eviction-sampling\">s\u00fa vystaven\u00e9<\/a><\/noindex> procesory Intel Core, po\u010d\u00ednaj\u00fac \u0161iestou gener\u00e1ciou (Sky, Kaby, Coffee, Whiskey, Amber Lake at\u010f.), ako aj niektor\u00e9 modely Intel Xeon a Xeon Scalable.<\/p>\n<p>Navy\u0161e m\u00f4\u017eeme spomen\u00fa\u0165 <noindex><a rel=\"nofollow\" href=\"https:\/\/mdsattacks.com\/#ridl-nng\">vylep\u0161enie<\/a><\/noindex> <noindex><a rel=\"nofollow\" href=\"https:\/\/github.com\/vusec\/ridl\/\">exploit<\/a><\/noindex>, ktor\u00fd umo\u017e\u0148uje pou\u017ei\u0165 met\u00f3dy \u00fatoku <noindex><a rel=\"nofollow\" href=\"https:\/\/mdsattacks.com\/\">RIDL<\/a><\/noindex> na ur\u010denie obsahu hash hesla root z \/etc\/shadow pri periodick\u00fdch pokusoch o autentifik\u00e1ciu. Ak p\u00f4vodne navrhnut\u00fd exploit ur\u010dil hash hesla za <noindex><a rel=\"nofollow\" href=\"https:\/\/www.youtube.com\/watch?v=JXPebaGY8RA\">24 hod\u00edn<\/a><\/noindex>, a po aplik\u00e1cii \u00faniku pri pr\u00e1ci mechanizmu asynchr\u00f3nneho preru\u0161enia oper\u00e1ci\u00ed (TAA, TSX Asynchronous Abort) vykon\u00e1val podobn\u00fa oper\u00e1ciu za <noindex><a rel=\"nofollow\" href=\"https:\/\/www.youtube.com\/watch?v=zaTxBZXE9pQ\">36 sek\u00fand<\/a><\/noindex>, tak nov\u00fd variant vykon\u00e1va \u00fatok za 4 sekundy.<\/p>\n<p><center><div class=\"youtube-placeholder\" data-id=\"4DQAcCfg3b8\" onclick=\"loadVideo(this)\">\r\n        <img decoding=\"async\" src=\"https:\/\/img.youtube.com\/vi\/4DQAcCfg3b8\/hqdefault.jpg\" alt=\"Prehrajte video\" loading=\"lazy\" width=\"480\" height=\"360\" style=\"width:100%;height:auto;\">\r\n        <div class=\"play-button\"><\/div>\r\n    <\/div><\/center><\/p>\n<p><noindex><a rel=\"nofollow\" name=\"link\"><\/a><\/noindex><\/p>\n<p>Zdroj: <a \ncontent=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/www.opennet.ru\/opennews\/art.shtml?num=52260\">opennet.ru<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u041a\u043e\u043c\u043f\u0430\u043d\u0438\u044f Intel \u0440\u0430\u0441\u043a\u0440\u044b\u043b\u0430 \u0441\u0432\u0435\u0434\u0435\u043d\u0438\u044f \u043e \u0434\u0432\u0443\u0445 \u043d\u043e\u0432\u044b\u0445 \u0443\u044f\u0437\u0432\u0438\u043c\u043e\u0441\u0442\u044f\u0445 \u0432 CPU Intel, \u0432\u044b\u0437\u0432\u0430\u043d\u043d\u044b\u0445 \u0443\u0442\u0435\u0447\u043a\u043e\u0439 \u0434\u0430\u043d\u043d\u044b\u0445 \u0438\u0437 \u043a\u044d\u0448\u0430 L1D (CVE-2020-0549, L1DES &#8212; L1D Eviction Sampling) \u0438 \u0432\u0435\u043a\u0442\u043e\u0440\u043d\u044b\u0445 \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u043e\u0432 (CVE-2020-0548, VRS &#8212; Vector Register Sampling). \u0423\u044f\u0437\u0432\u0438\u043c\u043e\u0441\u0442\u0438 \u043e\u0442\u043d\u043e\u0441\u044f\u0442\u0441\u044f \u043a \u043a\u043b\u0430\u0441\u0441\u0443 MDS (Microarchitectural Data Sampling) \u0438 \u043e\u0441\u043d\u043e\u0432\u044b\u0432\u0430\u044e\u0442\u0441\u044f \u043d\u0430 \u043f\u0440\u0438\u043c\u0435\u043d\u0435\u043d\u0438\u0438 \u043c\u0435\u0442\u043e\u0434\u043e\u0432 \u0430\u043d\u0430\u043b\u0438\u0437\u0430 \u043f\u043e \u0441\u0442\u043e\u0440\u043e\u043d\u043d\u0438\u043c \u043a\u0430\u043d\u0430\u043b\u0430\u043c \u043a \u0434\u0430\u043d\u043d\u044b\u043c \u0432 \u043c\u0438\u043a\u0440\u043e\u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u043d\u044b\u0445 \u0441\u0442\u0440\u0443\u043a\u0442\u0443\u0440\u0430\u0445. AMD, [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-55763","post","type-post","status-publish","format-standard","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.3 - aioseo.com -->\n\t<meta name=\"description\" content=\"\u041a\u043e\u043c\u043f\u0430\u043d\u0438\u044f Intel \u0440\u0430\u0441\u043a\u0440\u044b\u043b\u0430 \u0441\u0432\u0435\u0434\u0435\u043d\u0438\u044f \u043e \u0434\u0432\u0443\u0445 \u043d\u043e\u0432\u044b\u0445 \u0443\u044f\u0437\u0432\u0438\u043c\u043e\u0441\u0442\u044f\u0445 \u0432 CPU Intel, \u0432\u044b\u0437\u0432\u0430\u043d\u043d\u044b\u0445 \u0443\u0442\u0435\u0447\u043a\u043e\u0439 \u0434\u0430\u043d\u043d\u044b\u0445 \u0438\u0437 \u043a\u044d\u0448\u0430.\" \/>\n\t<meta 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