{"id":77492,"date":"2020-04-10T19:42:45","date_gmt":"2020-04-10T17:42:45","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe"},"modified":"2020-04-10T19:42:45","modified_gmt":"2020-04-10T17:42:45","slug":"poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","status":"publish","type":"post","link":"https:\/\/prohoster.info\/sk\/blog\/news\/poberegis-arm-novye-64-razryadnye-yadra-synopsys-arc-uvelichat-proizvoditelnost-vtroe","title":{"rendered":"Pozor, ARM? Nov\u00e9 64-bitov\u00e9 jadr\u00e1 Synopsys ARC zv\u00fd\u0161ia v\u00fdkon trikr\u00e1t","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

M\u00e1lokto vie, \u017ee procesorov\u00e1 architekt\u00fara ARC patr\u00ed medzi najroz\u0161\u00edrenej\u0161ie architekt\u00fary spolu s ARM, MIPS a x86. Vyvinut\u00e1 v 80. rokoch, architekt\u00fara ARC sa pou\u017e\u00edva v r\u00f4znych mikrokontrol\u00e9roch pre \u0161irok\u00e9 spektrum vysokotechnologick\u00fdch produktov, pri\u010dom ka\u017ed\u00fd rok sa na jej z\u00e1klade vyr\u00e1ba pribli\u017ene 1,5 miliardy<\/a><\/noindex> zariaden\u00ed.<\/p>\n

Ned\u00e1vno spolo\u010dnos\u0165 Synopsys ozn\u00e1mila nov\u00e9 gener\u00e1cie 32- a 64-bitov\u00fdch procesorov\u00fdch jadier ARC, ktor\u00e9 s\u013eubuj\u00fa trojn\u00e1sobn\u00e9 zv\u00fd\u0161enie v\u00fdkonu v porovnan\u00ed so svojimi predchodcami a umo\u017enia vytv\u00e1ra\u0165 syst\u00e9my na \u010dipe s 12 jadrami. Nov\u00e9 jadr\u00e1 tak umo\u017enia spolo\u010dnosti Synopsys s\u00fa\u0165a\u017ei\u0165 s ARM v nieko\u013ek\u00fdch nov\u00fdch oblastiach.<\/p>\n

«Integrovan\u00e9 aplikace jako ovlada\u010de pro pevn\u00e9 disky nebo s\u00ed\u0165ov\u00e1 za\u0159\u00edzen\u00ed se st\u00e1vaj\u00ed st\u00e1le slo\u017eit\u011bj\u0161\u00edmi, co\u017e vy\u017eaduje zna\u010dn\u00e9 zv\u00fd\u0161en\u00ed v\u00fdkonu p\u0159i omezen\u00e9 spot\u0159eb\u011b energie a velikosti», — \u0159ekl John Koeter, viceprezident pro marketing a strategii du\u0161evn\u00edho vlastnictv\u00ed ve spole\u010dnosti Synopsys. «S uveden\u00edm nov\u00e9 architektury ARCv3 a jader ARC HS5x a HS6x budou v\u00fdvoj\u00e1\u0159i schopni uspokojit rostouc\u00ed po\u017eadavky na v\u00fdkon sv\u00fdch SoC dnes a v budoucnu».<\/p>\n

\"Pozor,
\n<\/center><\/p>\n

Nov\u00e9 rodiny procesorov Synopsys DesignWare ARC zah\u0155\u0148aj\u00fa 32-bitov\u00e9 jadr\u00e1 HS56\/HS57D\/HS58<\/a><\/noindex> a 64-bitov\u00e9 jadr\u00e1 HS66\/HS68<\/a><\/noindex>. \u010cerstv\u011b ozn\u00e1men\u00e9 procesory jsou ur\u010deny pro \u0161irokou \u0161k\u00e1lu aplikac\u00ed, jako jsou ovlada\u010de pro pevn\u00e9 disky (SSD), s\u00ed\u0165ov\u00e9 ovlada\u010de, autopiloty pro vozidla, infotainmentov\u00e9 syst\u00e9my pro automobily a mnoh\u00e9 dal\u0161\u00ed. Vzhledem k rostouc\u00edm po\u017eadavk\u016fm na objemy opera\u010dn\u00ed pam\u011bti umo\u017en\u00ed 64-bitov\u00e9 ARC HD6x vytv\u00e1\u0159et syst\u00e9my s 4,5 PB DRAM, zat\u00edmco za\u0159\u00edzen\u00ed zalo\u017een\u00e9 na ARC HD5x budou muset b\u00fdt omezeny na men\u0161\u00ed objemy. Nicm\u00e9n\u011b skute\u010dn\u00e9 objemy podporovan\u00e9 opera\u010dn\u00ed pam\u011bti budou sp\u00ed\u0161e diktov\u00e1ny pou\u017eit\u00fdm opera\u010dn\u00edm syst\u00e9mem a viditeln\u00e9 v\u00fdhody 64-bitov\u00fdch CPU — \u0161ir\u0161\u00edm pipeline a v\u011bt\u0161\u00edm registrem soubor\u016f.<\/p>\n

Pokia\u013e ide o architekt\u00fary DesignWare ARC HS5x a DesignWare ARC HS6x, podporuj\u00fa in\u0161truk\u010dn\u00fd s\u00fabor ARCv3, ktor\u00fd je mo\u017en\u00e9 roz\u0161\u00edri\u0165 o in\u0161trukcie APEX (ARC Processor EXtensions), ak si niektor\u00fd z klientov bude potrebova\u0165 nie\u010do \u0161pecifick\u00e9. Okrem toho, ARC HS57D je vybaven\u00fd digit\u00e1lnym sign\u00e1lnym procesorom ARCv3DSP s podporou 150 in\u0161trukci\u00ed. Nov\u00e9 jadr\u00e1 maj\u00fa h\u013abku potrubia 10 \u00farovn\u00ed, dok\u00e1\u017eu vykon\u00e1va\u0165 dve in\u0161trukcie za cyklus a s\u00fa vybaven\u00e9 128-bitov\u00fdm modulom pre v\u00fdpo\u010dty s pohyblivou desatinnou \u010diarkou. V tomto pr\u00edpade najpokrokovej\u0161ie verzie jadier podporuj\u00fa druh\u00fa \u00farove\u0148 cache (L2) s ve\u013ekos\u0165ou a\u017e 16 MB.<\/p>\n

\"Pozor,<\/p>\n

Pokud jde o v\u00fdkon, spole\u010dnost Synopsys uv\u00e1d\u00ed 3 DMIPS na MHz v celo\u010d\u00edseln\u00fdch v\u00fdpo\u010dtech a tak\u00e9 5,1 CoreMark na MHz, co\u017e je velmi dobr\u00e9 pro miniaturn\u00ed j\u00e1dra s minim\u00e1ln\u00ed spot\u0159ebou energie. Tedy 3 DMIPS na MHz — to je v\u00edce ne\u017e u pom\u011brn\u011b v\u00fdkonn\u00fdch procesor\u016f, Cortex-A55<\/a><\/noindex>, zat\u00edmco 5,1 CoreMark na MHz — v\u00edce ne\u017e u jak\u00fdchkoli dal\u0161\u00edch. procesor ARM pre mikrokontrol\u00e9ry.<\/a><\/noindex><\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\n

Procesorov\u00e9 jadr\u00e1 Synopsys DesignWare ARC HS5x a HS6x
<\/strong><\/p>\n<\/td>\n<\/tr>\n

<\/td>\nHS5x<\/td>\nHS6x<\/td>\n<\/tr>\n
<\/td>\nHS56<\/td>\nHS57D<\/td>\nHS58<\/td>\nHS66<\/td>\nHS68<\/td>\n<\/tr>\n
In\u0161truk\u010dn\u00fd s\u00fabor<\/td>\nARCv3<\/td>\n<\/tr>\n
In\u0161trukcie APEX<\/td>\nPodporov\u00e1ny<\/td>\n<\/tr>\n
Bity<\/td>\n32-bitov\u00fd<\/td>\n64-bitov\u00fd<\/td>\n<\/tr>\n
In\u0161trukci\u00ed za cyklus<\/td>\n2<\/td>\n<\/tr>\n
D\u013a\u017eka potrubia<\/td>\n10 \u00farovn\u00ed<\/td>\n<\/tr>\n
DSP<\/td>\n\u2014<\/td>\nARCv3DSP
150 in\u0161trukci\u00ed<\/td>\n		\u2014<\/td>\n\u2014<\/td>\n\u2014<\/td>\n<\/tr>\n
Presnos\u0165 FPU<\/td>\nFP16, FP32, FP64<\/td>\n<\/tr>\n
Procesorov\u00fd klastra<\/td>\n12 jadier<\/td>\n<\/tr>\n
Zr\u00fdch\u013eova\u010dov na klastra<\/td>\n16 zr\u00fdch\u013eova\u010dov<\/td>\n<\/tr>\n
L1<\/td>\nCache in\u0161trukci\u00ed + Cache d\u00e1t<\/td>\n<\/tr>\n
L2<\/td>\n\u2014<\/td>\n\u2014<\/td>\n16 MB<\/td>\n\u2014<\/td>\n16 MB<\/td>\n<\/tr>\n
Maxim\u00e1lny objem pam\u00e4te<\/td>\n64 GB (z\u00e1vis\u00ed od OS)<\/td>\n4,5 Petabajtov<\/td>\n<\/tr>\n
Frekvencia (na t\/p 16FFC)<\/td>\n1,8 GHz<\/td>\n<\/tr>\n
DMIPS<\/td>\n5400 DMIPS na jadro \/ 3 DMIPS na MHz<\/td>\n<\/tr>\n
CoreMark<\/td>\n9180 CoreMark na jadro \/ 5,1 CoreMark na MHz<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Jednou z k\u013e\u00fa\u010dov\u00fdch vlastnost\u00ed novej rodiny DesignWare ARC HS5x a DesignWare ARC HS6x je mo\u017enos\u0165 vytv\u00e1ra\u0165 syst\u00e9my na \u010dipe (SoC) s 12 procesorov\u00fdmi jadrami pre v\u0161eobecn\u00e9 pou\u017eitie a 16 \u0161pecializovan\u00fdmi zr\u00fdch\u013eova\u010dmi. Ka\u017ed\u00e9 jadro\/zr\u00fdch\u013eova\u010d v takomto procesore pracuje na vlastnej taktovej frekvencii a vyu\u017e\u00edva vlastn\u00fa nap\u00e1jaciu subsyst\u00e9mu na maximaliz\u00e1ciu energetickej efekt\u00edvnosti. Spolu s nov\u00fdmi jadrami pon\u00faka Synopsys aj vn\u00fatroprocesorov\u00e9 cache koherentn\u00e9 spojenie s prenosovou r\u00fdchlos\u0165ou 800 GB\/s. <\/p>\n

Tak\u00e9to SoC zalo\u017een\u00e9 na architekt\u00fare ARC nie s\u00fa v s\u00fa\u010dasnosti ve\u013emi roz\u0161\u00edren\u00e9, ale z h\u013eadiska perspekt\u00edvnych procesorov pre syst\u00e9my automatiz\u00e1cie, ukladania d\u00e1t, spr\u00e1vy prenosov\u00fdch tokov, viacjadrov\u00e9 spracovanie a r\u00f4zne typy akceler\u00e1torov, pr\u00eddu ve\u013emi vhod. To posledn\u00e9 umo\u017en\u00ed spolo\u010dnosti Synopsys konkurova\u0165 jadram ARM o miesto v SoC pre uveden\u00e9 aplik\u00e1cie, \u010do sa doteraz nestalo. Tak\u017ee jadrami DesignWare ARC HS5x a DesignWare ARC HS6x sa u\u017e zauj\u00edma v\u00fdrobca pevn\u00e9ho disku Starblaze. <\/p>\n

«V\u00fdvoj\u00e1\u0159i vysoce v\u00fdkonn\u00fdch integrovan\u00fdch \u0159e\u0161en\u00ed se neust\u00e1le pot\u00fdkaj\u00ed s nov\u00fdmi v\u00fdzvami v oblasti dosa\u017een\u00ed vysok\u00e9ho v\u00fdkonu p\u0159i pou\u017eit\u00ed velk\u00fdch objem\u016f pam\u011bti a omezen\u00edch v oblasti spot\u0159eby energie a velikosti», — \u0159ekl Bruce Cheng, hlavn\u00ed v\u011bdeck\u00fd pracovn\u00edk spole\u010dnosti Starblaze. «Mo\u017enosti nov\u00fdch 32-bitov\u00fdch procesor\u016f ARC HS5x a 64-bitov\u00fdch procesor\u016f HS6x spole\u010dnosti Synopsys v oblasti v\u00edcej\u00e1drovosti n\u00e1m umo\u017en\u00ed p\u0159ej\u00edt na novou \u00farove\u0148 efektivity spot\u0159eby energie, kter\u00e1 nen\u00ed nab\u00edzena jin\u00fdmi procesory dostupn\u00fdmi na trhu v sou\u010dasnosti».<\/p>\n

\"Pozor,<\/p>\n

Synopsys za\u010dne pon\u00faka\u0165 jadra ARC HS56, HS57D, HS58, HS66, HS68 a ich viacprocesorov\u00e9 verzie HS56MP, HS57DMP, HS58MP, HS66MP, HS68MP od tretieho \u0161tvr\u0165roka 2020. Okrem toho spolo\u010dnos\u0165 pon\u00fakne bal\u00edk ARC MetaWare Development Toolkit na vytv\u00e1ranie \u010dipov zalo\u017een\u00fdch na uveden\u00fdch jadr\u00e1ch, ako aj simul\u00e1tor a verifik\u00e1tor na overenie funk\u010dnosti SoC pred realiz\u00e1ciou v krem\u00edku. \u010co sa t\u00fdka podpory zo strany opera\u010dn\u00fdch syst\u00e9mov, nov\u00e9 jadra bud\u00fa kompatibiln\u00e9 s nieko\u013ek\u00fdmi distrib\u00faciami Linuxu, Zephyr a r\u00f4znymi slu\u017ebami OS.<\/p>\n

<\/p>\n

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Zdroj: 3dnews.ru<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

\u041d\u0435\u043c\u043d\u043e\u0433\u0438\u0435 \u0437\u043d\u0430\u044e\u0442, \u0447\u0442\u043e \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u0430\u044f \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0430 ARC \u044f\u0432\u043b\u044f\u0435\u0442\u0441\u044f \u043e\u0434\u043d\u043e\u0439 \u0438\u0437 \u0441\u0430\u043c\u044b\u0445 \u0440\u0430\u0441\u043f\u0440\u043e\u0441\u0442\u0440\u0430\u043d\u0435\u043d\u043d\u044b\u0445 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440 \u043d\u0430\u0440\u044f\u0434\u0443 \u0441 ARM, MIPS \u0438 x86. \u0420\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0430\u043d\u043d\u0430\u044f \u0432 1980-\u0445 \u0433\u043e\u0434\u0430\u0445, \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0430 ARC \u043f\u0440\u0438\u043c\u0435\u043d\u044f\u0435\u0442\u0441\u044f \u0432 \u0440\u0430\u0437\u043b\u0438\u0447\u043d\u044b\u0445 \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u0430\u0445 \u0434\u043b\u044f \u0448\u0438\u0440\u043e\u0447\u0430\u0439\u0448\u0435\u0433\u043e \u0441\u043f\u0435\u043a\u0442\u0440\u0430 \u0432\u044b\u0441\u043e\u043a\u043e\u0442\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0447\u043d\u043e\u0439 \u043f\u0440\u043e\u0434\u0443\u043a\u0446\u0438\u0438, \u0430 \u043a\u0430\u0436\u0434\u044b\u0439 \u0433\u043e\u0434 \u043d\u0430 \u043e\u0441\u043d\u043e\u0432\u0435 ARC \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0441\u044f \u043e\u043a\u043e\u043b\u043e 1,5 \u043c\u0438\u043b\u043b\u0438\u0430\u0440\u0434\u0430 \u0443\u0441\u0442\u0440\u043e\u0439\u0441\u0442\u0432. \u041d\u0430 \u0434\u043d\u044f\u0445 \u043a\u043e\u0440\u043f\u043e\u0440\u0430\u0446\u0438\u044f Synopsys \u0430\u043d\u043e\u043d\u0441\u0438\u0440\u043e\u0432\u0430\u043b\u0430 \u043d\u043e\u0432\u043e\u0435 \u043f\u043e\u043a\u043e\u043b\u0435\u043d\u0438\u0435 32- \u0438 64-\u0440\u0430\u0437\u0440\u044f\u0434\u043d\u044b\u0445 \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440\u043d\u044b\u0445 […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":77493,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[702],"tags":[],"class_list":["post-77492","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Pozor, ARM? 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