Vhidhiyo iyi inoratidza: Raspberry Pi3 bhodhi, iyo, kuburikidza neGPIO yekubatanidza, iyo FPGA Mars Rover2rpi (Cyclone IV) bhodhi yakabatana, iyo iyo HDMI monitor yakabatana. Yechipiri yekutarisa yakabatana kuburikidza neyakajairwa Raspberry Pi3 HDMI yekubatanidza. Zvese pamwe chete zvinoshanda senge mbiri yekutarisa system.
Zvino ini ndichakuudza kuti inofambiswa sei.
Iyo yakakurumbira Raspberry Pi3 bhodhi ine GPIO yekubatanidza iyo yaunogona kubatanidza akasiyana ekuwedzera mabhodhi: masensa, LEDs, stepper mota vatyairi uye zvimwe zvakawanda. Iyo chaiyo basa repini yega yega pane yekubatanidza zvinoenderana neiyo port configuration. Iyo GPIO ALT2 kumisikidzwa inobvumidza iwe kuti uchinje chinongedzo kune iyo DPI interface mode, Display Parallel Interface. Kune mabhodhi ekuwedzera ekubatanidza VGA monitors kuburikidza neDPI. Nekudaro, chekutanga, VGA monitors haisisiri yakajairika seHDMI, uye chechipiri, iyo digital interface iri kuita nani pane analog. Uyezve, iyo DAC pamakadhi ekuwedzera eVGA akadaro anowanzo kugadzirwa mumhando yeR-2-R cheni uye kazhinji haipfuure 6 bits pamuvara.
Mune ALT2 modhi, mapini eGPIO yekubatanidza ane zvinotevera zvinoreva:
Pano ndakapenda mapini eRGB ekubatanidza tsvuku, girini uye bhuruu zvakateerana. Mamwe masaini akakosha ndeye V-SYNC uye H-SYNC kutsvaira masaini masaini, pamwe neCLK. Iyo CLK wachi frequency ndiyo frequency iyo pixel values ββinoburitswa kune yekubatanidza uye zvinoenderana neyakasarudzwa vhidhiyo modhi.
Kuti ubatanidze dhijitari HDMI yekutarisa, unofanirwa kutora DPI interface masaini uye woashandura kune HDMI masaini. Izvi zvinogona kuitwa, semuenzaniso, uchishandisa chero FPGA board. Sezvazvakazoitika, iyo Mars Rover2rpi bhodhi inokodzera chinangwa ichi. Muchokwadi, iyo huru sarudzo yekubatanidza iyi bhodhi kuburikidza neyakakosha adapta inoita seizvi:
Iri bhodhi rinoshandiswa kuwedzera nhamba yeGPIO ports uye kubatanidza mamwe maperipherals kune raspberry. Panguva imwecheteyo, masaini mana eGPIO ane chinongedzo ichi anoshandiswa kuJTAG masaini, kuitira kuti chirongwa kubva pakugovera chinogona kurodha FPGA firmware muFPGA. Nekuda kweizvi, kubatana kwakadaro kwakajairwa hakundikodzeri, masaini mana DPI anodonha. Sezvineiwo, mamwe macombs ari pabhodhi ane Raspberry-inoenderana pinout. Kuti ndikwanise kutenderedza bhodhi 4 madhigirii uye ndichiri kubatanidza kune raspberry yangu:
Ehe, iwe uchafanirwa kushandisa yekunze JTAG programmer, asi iri harisi dambudziko.
Pachine dambudziko diki. Haisi yega pini yeFPGA inogona kushandiswa sekuisa wachi. Kune mashoma mapini akatsaurirwa anogona kushandiswa kune chinangwa ichi. Saka zvakazoitika pano kuti iyo GPIO_0 CLK siginecha haisvike kune iyo FPGA yekuisa, iyo inogona kushandiswa seFPGA wachi yekuisa. Saka zvakangofanana, ndaifanira kukanda imwe post pascarf. Ini ndinobatanidza GPIO_0 uye KEY[1] chiratidzo chebhodhi:
Zvino ini ndichakuudza zvishoma nezve purojekiti muFPGA. Iko kuoma kukuru mukugadzirwa kweHDMI zviratidzo ndeyepamusoro zvakanyanya. Ukatarisa pinout yeHDMI yekubatanidza, iwe unogona kuona kuti masaini eRGB ave zvino serial mutsauko masaini:
Iko kushandiswa kwechiratidzo chekusiyanisa kunobvumidza iwe kubata neyakajairwa modhi ruzha pamutsetse wekutumira. Muchiitiko ichi, iyo yekutanga-bit kodhi yechiratidzo chega chega inoshandurwa kuita 10-bit TMDS (Transition-minimized differential signing). Iyi inzira yakakosha yekubvisa iyo DC chikamu kubva pachiratidzo uye kuderedza chiratidzo chekuchinja mumutsara wekusiyanisa. Sezvo iko zvino kwave negumi mabhiti ekufambisa pabyte yeruvara pamusoro peiyo serial mutsara, zvinoitika kuti wachi frequency ye serializer inofanira kunge yakakwira kagumi pane wachi frequency yemapikisi. Kana tikatora semuenzaniso vhidhiyo modhi 10x10 1280Hz, ipapo pixel frequency yeiyi modhi ndeye 720MHz. Iyo serializer inofanirwa kuve 60 MHz.
Zvakajairwa FPGAs kazhinji hazvigone izvi, zvinosiririsa. Nekudaro, kune rombo redu, maFPGAs akavaka-muDDIO mapini. Idzi mhedziso dzatove, sekunge, 2-to-1 serilizers. Ndiko kuti, ivo vanogona kuburitsa mabheti maviri mukutevedzana pamwe nekukwira nekudonha wachi frequency. Izvi zvinoreva kuti muchirongwa cheFPGA haugone kushandisa kwete 740 MHz, asi 370 MHz, asi iwe unofanirwa kushandisa iyo DDIO inobuda zvinhu muFPGA. Pano 370 MHz yatove yakawanda inogoneka frequency. Nehurombo, iyo 1280 Γ 720 modhi ndiyo muganho. Kugadziriswa kwepamusoro hakugone kuwanikwa muFPGA Cyclone IV yedu yakaiswa paRover2rpi board.
Saka, mupurojekiti, inopinza pixel frequency CLK inodyiswa kuPLL, iyo inowedzerwa ne5. Panguva iyi, R, G, B bytes inoshandurwa kuita bit pairs. Izvi ndizvo zvinoitwa neTMDS encoder. Iyo kodhi kodhi paVerilog HDL inoita seizvi:
module hdmi(
input wire pixclk, // 74MHz
input wire clk_TMDS2, // 370MHz
input wire hsync,
input wire vsync,
input wire active,
input wire [7:0]red,
input wire [7:0]green,
input wire [7:0]blue,
output wire TMDS_bh,
output wire TMDS_bl,
output wire TMDS_gh,
output wire TMDS_gl,
output wire TMDS_rh,
output wire TMDS_rl
);
wire [9:0] TMDS_red, TMDS_green, TMDS_blue;
TMDS_encoder encode_R(.clk(pixclk), .VD(red ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_red));
TMDS_encoder encode_G(.clk(pixclk), .VD(green), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_green));
TMDS_encoder encode_B(.clk(pixclk), .VD(blue ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_blue));
reg [2:0] TMDS_mod5=0; // modulus 5 counter
reg [4:0] TMDS_shift_bh=0, TMDS_shift_bl=0;
reg [4:0] TMDS_shift_gh=0, TMDS_shift_gl=0;
reg [4:0] TMDS_shift_rh=0, TMDS_shift_rl=0;
wire [4:0] TMDS_blue_l = {TMDS_blue[9],TMDS_blue[7],TMDS_blue[5],TMDS_blue[3],TMDS_blue[1]};
wire [4:0] TMDS_blue_h = {TMDS_blue[8],TMDS_blue[6],TMDS_blue[4],TMDS_blue[2],TMDS_blue[0]};
wire [4:0] TMDS_green_l = {TMDS_green[9],TMDS_green[7],TMDS_green[5],TMDS_green[3],TMDS_green[1]};
wire [4:0] TMDS_green_h = {TMDS_green[8],TMDS_green[6],TMDS_green[4],TMDS_green[2],TMDS_green[0]};
wire [4:0] TMDS_red_l = {TMDS_red[9],TMDS_red[7],TMDS_red[5],TMDS_red[3],TMDS_red[1]};
wire [4:0] TMDS_red_h = {TMDS_red[8],TMDS_red[6],TMDS_red[4],TMDS_red[2],TMDS_red[0]};
always @(posedge clk_TMDS2)
begin
TMDS_shift_bh <= TMDS_mod5[2] ? TMDS_blue_h : TMDS_shift_bh [4:1];
TMDS_shift_bl <= TMDS_mod5[2] ? TMDS_blue_l : TMDS_shift_bl [4:1];
TMDS_shift_gh <= TMDS_mod5[2] ? TMDS_green_h : TMDS_shift_gh [4:1];
TMDS_shift_gl <= TMDS_mod5[2] ? TMDS_green_l : TMDS_shift_gl [4:1];
TMDS_shift_rh <= TMDS_mod5[2] ? TMDS_red_h : TMDS_shift_rh [4:1];
TMDS_shift_rl <= TMDS_mod5[2] ? TMDS_red_l : TMDS_shift_rl [4:1];
TMDS_mod5 <= (TMDS_mod5[2]) ? 3'd0 : TMDS_mod5+3'd1;
end
assign TMDS_bh = TMDS_shift_bh[0];
assign TMDS_bl = TMDS_shift_bl[0];
assign TMDS_gh = TMDS_shift_gh[0];
assign TMDS_gl = TMDS_shift_gl[0];
assign TMDS_rh = TMDS_shift_rh[0];
assign TMDS_rl = TMDS_shift_rl[0];
endmodule
module TMDS_encoder(
input clk,
input [7:0] VD, // video data (red, green or blue)
input [1:0] CD, // control data
input VDE, // video data enable, to choose between CD (when VDE=0) and VD (when VDE=1)
output reg [9:0] TMDS = 0
);
wire [3:0] Nb1s = VD[0] + VD[1] + VD[2] + VD[3] + VD[4] + VD[5] + VD[6] + VD[7];
wire XNOR = (Nb1s>4'd4) || (Nb1s==4'd4 && VD[0]==1'b0);
wire [8:0] q_m = {~XNOR, q_m[6:0] ^ VD[7:1] ^ {7{XNOR}}, VD[0]};
reg [3:0] balance_acc = 0;
wire [3:0] balance = q_m[0] + q_m[1] + q_m[2] + q_m[3] + q_m[4] + q_m[5] + q_m[6] + q_m[7] - 4'd4;
wire balance_sign_eq = (balance[3] == balance_acc[3]);
wire invert_q_m = (balance==0 || balance_acc==0) ? ~q_m[8] : balance_sign_eq;
wire [3:0] balance_acc_inc = balance - ({q_m[8] ^ ~balance_sign_eq} & ~(balance==0 || balance_acc==0));
wire [3:0] balance_acc_new = invert_q_m ? balance_acc-balance_acc_inc : balance_acc+balance_acc_inc;
wire [9:0] TMDS_data = {invert_q_m, q_m[8], q_m[7:0] ^ {8{invert_q_m}}};
wire [9:0] TMDS_code = CD[1] ? (CD[0] ? 10'b1010101011 : 10'b0101010100) : (CD[0] ? 10'b0010101011 : 10'b1101010100);
always @(posedge clk) TMDS <= VDE ? TMDS_data : TMDS_code;
always @(posedge clk) balance_acc <= VDE ? balance_acc_new : 4'h0;
endmodule
Ipapo mapairi anobuda anopihwa kune iyo DDIO inobuda, iyo inoteedzana inoburitsa imwe-bit chiratidzo pakusimuka nekudonha.
DDIO pachayo inogona kutsanangurwa neVerilog kodhi seizvi:
module ddio(
input wire d0,
input wire d1,
input wire clk,
output wire out
);
reg r_d0;
reg r_d1;
always @(posedge clk)
begin
r_d0 <= d0;
r_d1 <= d1;
end
assign out = clk ? r_d0 : r_d1;
endmoduleAsi pamwe hazvishande nenzira iyoyo. Iwe unofanirwa kushandisa Altera's ALTDDIO_OUT megafunction kunyatso shandisa iyo DDIO inobuda zvinhu. Muchirongwa changu, chikamu cheraibhurari ALTDDIO_OUT chinoshandiswa.
Zvose zvinogona kutaridzika zvishoma, asi zvinoshanda.
Iwe unogona kuona iyo yese sosi kodhi yakanyorwa muVerilog HDL .
Iyo yakasanganiswa firmware yeFPGA yakanyudzwa muEPCS chip yakaiswa paMars Rover2rpi board. Nekudaro, kana simba rikaiswa kuFPGA bhodhi, iyo FPGA inotangisa kubva ku flash memory uye kutanga.
Iye zvino tinoda kutaura zvishoma pamusoro pekugadzirisa kweRaspberry pachayo.
Ndiri kuita zviedzo paRaspberry PI OS (32 bit) zvichibva paDebian Buster, Shanduro:Nyamavhuvhu 2020,
Zuva rekuburitswa:2020-08-20, Kernel vhezheni:5.4.
Iwe unofanirwa kuita zvinhu zviviri:
- gadzirisa config.txt faira;
- gadzira X server configuration kuti ishande nemamonitor maviri.
Paunenge uchigadzirisa iyo /boot/config.txt faira, unofanirwa:
- kudzima kushandiswa kwei2c, i2s, spi;
- gonesa DPI modhi ine overlay dtoverlay=dpi24;
- seta vhidhiyo modhi 1280 Γ 720 60Hz, 24 bits pane imwe pfungwa paDPI;
- tsanangura nhamba inodiwa yemaframebuffers 2 (max_framebuffers=2, ipapo chete ndipo pachazoonekwa yechipiri mudziyo /dev/fb1)
Mashoko akazara efaira reconfig.txt anoita seizvi.
# For more options and information see
# http://rpf.io/configtxt
# Some settings may impact device functionality. See link above for details
# uncomment if you get no picture on HDMI for a default "safe" mode
#hdmi_safe=1
# uncomment this if your display has a black border of unused pixels visible
# and your display can output without overscan
disable_overscan=1
# uncomment the following to adjust overscan. Use positive numbers if console
# goes off screen, and negative if there is too much border
#overscan_left=16
#overscan_right=16
#overscan_top=16
#overscan_bottom=16
# uncomment to force a console size. By default it will be display's size minus
# overscan.
#framebuffer_width=1280
#framebuffer_height=720
# uncomment if hdmi display is not detected and composite is being output
hdmi_force_hotplug=1
# uncomment to force a specific HDMI mode (this will force VGA)
#hdmi_group=1
#hdmi_mode=1
# uncomment to force a HDMI mode rather than DVI. This can make audio work in
# DMT (computer monitor) modes
#hdmi_drive=2
# uncomment to increase signal to HDMI, if you have interference, blanking, or
# no display
#config_hdmi_boost=4
# uncomment for composite PAL
#sdtv_mode=2
#uncomment to overclock the arm. 700 MHz is the default.
#arm_freq=800
# Uncomment some or all of these to enable the optional hardware interfaces
#dtparam=i2c_arm=on
#dtparam=i2s=on
#dtparam=spi=on
dtparam=i2c_arm=off
dtparam=spi=off
dtparam=i2s=off
dtoverlay=dpi24
overscan_left=0
overscan_right=0
overscan_top=0
overscan_bottom=0
framebuffer_width=1280
framebuffer_height=720
display_default_lcd=0
enable_dpi_lcd=1
dpi_group=2
dpi_mode=87
#dpi_group=1
#dpi_mode=4
dpi_output_format=0x6f027
dpi_timings=1280 1 110 40 220 720 1 5 5 20 0 0 0 60 0 74000000 3
# Uncomment this to enable infrared communication.
#dtoverlay=gpio-ir,gpio_pin=17
#dtoverlay=gpio-ir-tx,gpio_pin=18
# Additional overlays and parameters are documented /boot/overlays/README
# Enable audio (loads snd_bcm2835)
dtparam=audio=on
[pi4]
# Enable DRM VC4 V3D driver on top of the dispmanx display stack
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2
[all]
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2
Mushure meizvozvo, iwe unofanirwa kugadzira faira yekumisikidza yeX server kushandisa mamonitor maviri pane maviri furemu /dev/fb0 uye /dev/fb1:
My config file is /usr/share/x11/xorg.conf.d/60-dualscreen.conf sezvizvi
Section "Device"
Identifier "LCD"
Driver "fbturbo"
Option "fbdev" "/dev/fb0"
Option "ShadowFB" "off"
Option "SwapbuffersWait" "true"
EndSection
Section "Device"
Identifier "HDMI"
Driver "fbturbo"
Option "fbdev" "/dev/fb1"
Option "ShadowFB" "off"
Option "SwapbuffersWait" "true"
EndSection
Section "Monitor"
Identifier "LCD-monitor"
Option "Primary" "true"
EndSection
Section "Monitor"
Identifier "HDMI-monitor"
Option "RightOf" "LCD-monitor"
EndSection
Section "Screen"
Identifier "screen0"
Device "LCD"
Monitor "LCD-monitor"
EndSection
Section "Screen"
Identifier "screen1"
Device "HDMI"
Monitor "HDMI-monitor"
EndSection
Section "ServerLayout"
Identifier "default"
Option "Xinerama" "on"
Option "Clone" "off"
Screen 0 "screen0"
Screen 1 "screen1" RightOf "screen0"
EndSection
Zvakanaka, kana isati yaiswa, saka unofanirwa kuisa Xinerama. Ipapo nzvimbo yedesktop ichawedzerwa zvizere kune maviri monitors, sezvakaratidzwa muvhidhiyo yedemo iri pamusoro.
Ndizvo zvimwe chete. Zvino, varidzi veRaspberry Pi3 vachakwanisa kushandisa mamonitor maviri.
Tsanangudzo uye dhizaini yeMars Rover2rpi bhodhi inogona kuva .
Source: www.habr.com