Π Ndakaedza kuudza hobby mainjiniya emagetsi akakurira kubva kuArduino bhurugwa sei uye nei vachifanira kuverenga madheti uye mamwe magwaro e microcontrollers. Rugwaro rwacho rwakava rukuru, naizvozvo ndakavimbisa kuratidza mienzaniso inoshanda mune imwe nyaya. Hameno aizviti mushroom wemukaka...
Nhasi ini ndichakuratidza mashandisiro ezvinyorwa kugadzirisa zviri nyore, asi zvinodiwa kumapurojekiti mazhinji, mabasa paSTM32 (Blue Pill) uye STM8 controllers. Ese mapurojekiti edemo akatsaurirwa kune andinoda maLEDs; isu tichaavhenekera muhuwandu hukuru, hwatichafanira kushandisa ese marudzi eanonakidza maperipheral.
Iwo mameseji zvakare akave akakura, saka kuti zvive nyore ndiri kugadzira zvirimo:
Disclaimer: Ini handisi injinjini, handinyepedzeri kuva neruzivo rwakadzama mune zvemagetsi, chinyorwa chakaitirwa maamateurs seni. Muchokwadi, ndakazviona makore maviri apfuura sevanhu vakatarisana. Dai mumwe munhu akandiudza ipapo kuti dhetabheti pane yaasingazivi chip akanga asingatyi kuverenga, ndingadai ndisina kupedza nguva yakawanda ndichitsvaga zvimwe zvimedu zvekodhi paInternet uye nekugadzira madondoro ane chigero uye tepi yekunamatira.
Kutariswa kwechinyorwa ichi kuri pamadatabase, kwete mapurojekiti, saka iyo kodhi inogona kunge isiri yakanyanya kutsvinda uye kazhinji yakamanikana. Iwo mapurojekiti pachawo ari nyore kwazvo, kunyangwe akakodzera kune yekutanga kuzivana neiyo chip nyowani.
Ndinovimba kuti chinyorwa changu chichabatsira mumwe munhu padanho rakafanana rekunyudzwa mune yekuzvivaraidza.
STM32
16 ma LED ane DM634 uye SPI
Chirongwa chidiki chinoshandisa Blue Pill (STM32F103C8T6) uye DM634 LED mutyairi. Tichishandisa madheti, isu tichaona mutyairi, STM IO ports uye kugadzirisa SPI.
DM634
Taiwanese chip ine 16 16-bit PWM zvabuda, inogona kubatanidzwa mumaketani. Iyo yakaderera-yekupedzisira 12-bit modhi inozivikanwa kubva kune yepamba chirongwa . Pane imwe nguva, kusarudza pakati peDM63x uye inozivikanwa TLC5940, ndakasarudza DM nekuda kwezvikonzero zvakawanda: 1) TLC paAliexpress ndeyechokwadi fake, asi iyi haisi; 2) DM ine inozvimiririra PWM ine yayo frequency jenareta; 3) inogona kutengwa zvisingadhuri muMoscow, pane kumirira pasuru kubva kuAli. Uye, hongu, zvainakidza kudzidza kudzora chip iwe pachako, pane kushandisa raibhurari yakagadzirwa. Chips ikozvino inonyanya kuratidzwa muSSOP24 package; zviri nyore kutengesa kune adapta.
Sezvo mugadziri ari weTaiwanese, iyo chip yakanyorwa muchiChinese Chirungu, zvinoreva kuti ichave inonakidza. Kutanga tinotarisa pinout (Pin Connection) kunzwisisa kuti gumbo ripi rekubatanidza chii, uye tsananguro yemapini (Pin Tsananguro) 16 pini:
DC Sink Sources (Open Drain)
Kunyura / Open-drain output - mvura; tsime rekuyerera kwezvino; iyo inobuda yakabatana nevhu munzvimbo inoshanda - ma LED akabatanidzwa kumutyairi nema cathodes. Nemagetsi, izvi, hongu, kwete "yakavhurika drain" (open drain), asi mumadhetabheti aya mazita emapini mune drain mode anowanzo kuwanikwa.
External resistors pakati peREXT neGND kuseta kukosha kwazvino
Reference resistor yakaiswa pakati pepini yeREXT uye pasi, iyo inodzora kupikisa kwemukati kwezvinobuda, ona girafu riri papeji 9 yedatabase. MuDM634, kuramba uku kunogona kudzorwa nesoftware, kuseta kupenya kwese (kupenya kwepasi rose); Ini handisi kuzopinda mune zvakadzama muchinyorwa ichi, ini ndichangoisa 2.2 - 3 kOhm resistor pano.
Kuti unzwisise maitiro ekudzora chip, ngatitarise tsananguro yedhizaini interface:
Hongu, hezvino, Chinese English mukubwinya kwayo kose. Kududzira izvi kunenetsa, unogona kuzvinzwisisa kana uchida, asi pane imwe nzira - tarisa kuti kubatana kune inoshanda yakafanana TLC5940 kunotsanangurwa sei mudhetabheti:
... Pini nhatu chete dzinodiwa kuti uise data mumudziyo. Iko kusimuka kwechiratidzo cheSCLK kunoshandura data kubva kuSIN pini kuenda kurejista yemukati. Mushure mekunge data yese yatakurwa, pfupi pfupi yakakwira XLAT siginecha inosungirira iyo sequentially kuendesa data mumarejista emukati. Marejista emukati masuwo anokonzereswa neiyo XLAT chiratidzo chemazinga. Yese data inofambiswa zvakanyanya kukosha kutanga.
Latch β latch/latch/lock.
Rising edge - inotungamira kumucheto kwepurusi
MSB kutanga - inonyanya kukosha (kuruboshwe) zvishoma kumberi.
kuvhara data - fambisa data sequentially (zvishoma nezvishoma).
Izwi latch inowanzowanikwa mune zvinyorwa zvechipisi uye inoshandurwa nenzira dzakasiyana-siyana, saka nekuda kwekunzwisisa ndichazvibvumira
chirongwa chidiki chedzidzoMutyairi we LED anonyanya kushandura rejista. "Shift" (kusuduruka) muzita - bitwise kufamba kwedata mukati memudziyo: bhiti idzva rega rega rinosaidzirwa mukati rinosundira cheni yese mberi kumberi kwayo. Sezvo pasina munhu anoda kuona chaotic blinking ye LEDs panguva yekuchinja, maitiro acho anoitika mumabhafa marejista akaparadzaniswa kubva kune anoshanda marejista nedamper (latch) imhando yekamuri yekumirira umo mabhiti akarongwa munhevedzano yaunoda. Kana zvinhu zvose zvagadzirira, kuvhara kunovhura uye mabheti anoenda kunoshanda, achitsiva batch yapfuura. Shoko latch mune zvinyorwa zve microcircuits zvinogara zvichireva damper yakadaro, zvisinei kuti inoshandiswa mumasanganiswa api.
Saka, kuendesa data kuDM634 kunoitwa seizvi: isa iyo DAI yekuisa kune kukosha kweiyo inonyanya kukosha yeiyo kure LED, dhonza DCK kumusoro uye pasi; isa iyo DAI yekuisa kukosha kweiyo inotevera bhiti, dhonza DCK; uye zvichingodaro kusvika zvidimbu zvese zvafambiswa (clocked in), mushure mezvo tinodhonza LAT. Izvi zvinogona kuitwa nemaoko (bit-bang), asi zviri nani kushandisa SPI interface yakanyatsogadzirirwa izvi, sezvo inoratidzwa paSTM32 yedu mumakopi maviri.
Piritsi reBlue STM32F103
Nhanganyaya: STM32 controllers yakanyanya kuomarara kupfuura Atmega328 pane iyo ingaite senge inotyisa. Uyezve, nekuda kwezvikonzero zvekuchengetedza simba, anenge ese maperipheral anodzimwa pakutanga, uye wachi frequency ndeye 8 MHz kubva mukati memukati. Neraki, STM programmers vakanyora kodhi inounza chip kusvika kune "yakaverengerwa" 72 MHz, uye vanyori veese maIDE andinoziva akaisanganisira mukutanga maitiro, saka isu hatifanire kuvharika (asi. ) Asi iwe uchafanirwa kubatidza maperipherals.
Zvinyorwa: Piritsi reBlue rakashongedzerwa neiyo yakakurumbira STM32F103C8T6 chip, kune maviri magwaro anobatsira ayo:
- kune microcontrollers STM32F103x8 uye STM32F103xB;
- kune yese STM32F103 mutsara uye nezvimwe.
Mune dhetabheti tinogona kufarira:
- Pinouts - chip pinouts - kana tikafunga kugadzira mabhodhi isu pachedu;
- Memory Mepu - mepu yendangariro kune chaiyo chip. Reference Manual ine mepu yemutsetse wese, uye inotaura marejista ayo edu asina.
- Pin Tsanangudzo tafura - kunyora makuru uye mamwe mabasa emapini; ye "blue piritsi" unogona kuwana mamwe mapikicha ari nyore paInternet ane runyorwa rwepini nemabasa avo. Naizvozvo, isu tinobva tango google Blue Pill pinout uye chengeta uyu mufananidzo uri pedyo:
NB: pakanga paine kukanganisa mumufananidzo kubva paInternet, iyo yakacherechedzwa mumashoko, ndinokutendai nazvo. Mufananidzo wacho wakatsiviwa, asi ichi chidzidzo - zviri nani kutarisa ruzivo kwete kubva ku databases.
Isu tinobvisa dheteti, tinovhura Reference Manual, uye kubva zvino zvichienda mberi isu tinoishandisa chete.
Maitiro: isu tinobata neyakajairwa yekupinda / kubuda, gadzira SPI, vhura inodiwa peripherals.
Input Output
PaAtmega328, I/O inoshandiswa zvakapusa, ndosaka kuwanda kweSTM32 sarudzo kuchigona kuvhiringa. Zvino isu tinongoda mhedziso, asi kunyangwe idzi dzine sarudzo ina:
vhura dhiraini, dhonza-dhonza, kumwe kusunda-dhonza, kumwe kuvhura mvura
"Dhonza-sundira" (Pusha-dhonza) ndiyo inowanzobuda kubva kuArduino, pini inogona kutora kukosha kungave HIGH kana LOW. Asi ne "open drain" iripo , kunyangwe hazvo zvese zviri nyore pano:
Kugadziriswa kwekubuda / kana chiteshi chakapihwa kubuda: / buffer yekubuda yakagoneswa: / - vhura drain mode: "0" murejista yekubuda inogonesa N-MOS, "1" mune yekubuda rejista inosiya chiteshi muHi-Z modhi ( P-MOS haina kuvhurwa) / - push-pull mode: "0" mune inobuda rejista inomutsa N-MOS, "1" mune inobuda rejista inomutsa P-MOS.
Musiyano wese pakati pekuvhura drain (open drain) kubva kuβpush-dhonzaβ (Pusha-dhonza) ndeyekuti mupini yekutanga haigone kugamuchira iyo HIGH state: kana uchinyora imwe kune yekuburitsa regisheni, inoenda mune yakanyanya kupikisa mode (kukwirira kwemhepo, Hi-Z) Paunenge uchinyora zero, pini inoita zvakafanana mumamodhi ese ari maviri, zvine musoro uye nemagetsi.
Mune yakajairika kubuda modhi, pini inongotepfenyura zvirimo murejista inobuda. Mune "imwe nzira" inodzorwa neinopindirana inotenderera (ona 9.1.4):
Kana bhiti rechiteshi rikagadziriswa serimwe basa repini, regisita yepini inovharwa uye pini inobatanidzwa nepini yepini.
Alternative functionality yepini yega yega inotsanangurwa mukati Pin Tsanangudzo Database iri pamufananidzo wakatorwa. Kumubvunzo wezvekuita kana pini iine akati wandei mamwe mabasa, mhinduro inopiwa nerunyoro mudhetabheti:
Kana maperipheral akawanda akashandisa pini imwe chete, kudzivirira kunetsana pakati pemamwe mabasa, chikamu chimwe chete chinofanira kushandiswa panguva, chichichinjika pachishandiswa wachi yevhavha inogonesa bit (muRCC rejista yakakodzera).
Chekupedzisira, mapini mune yekubuda modhi anewo kumhanya kwewachi. Ichi chimwe chinhu chekuchengetedza simba; mune yedu isu, isu tinongoiisa kune yakanyanya uye kuikanganwa.
Saka: isu tiri kushandisa SPI, zvinoreva kuti mapini maviri (ane data uye newachi chiratidzo) anofanira kunge ari "alternative push-pull function", uye imwe (LAT) inofanira kunge iri "nguva dzose kusunda-kudhonza". Asi tisati tavapa, ngatitarisei neSPI.
SPI
Chimwe chirongwa chidiki chedzidzo
SPI kana Serial Peripheral Interface (serial peripheral interface) iri nyore uye inoshanda kwazvo interface yekubatanidza MK nemamwe maMK uye nekunze kwenyika zvakazara. Nheyo yekushanda kwayo yakatotsanangurwa pamusoro apa, pamusoro peChinese LED mutyairi (mune referensi bhuku, ona chikamu 25). SPI inogona kushanda mune tenzi ("tenzi") uye muranda ("muranda") modhi. SPI ine mana akakosha nzira, ayo asiri ese anogona kushandiswa:
- MOSI, Master Output / Slave Input: iyi pini inotumira data mune master mode, uye inogamuchira data munhapwa mode;
- MISO, Master Input / Slave Output: pane kudaro, inogamuchira muna tenzi, uye inopfuudza mumuranda;
- SCK, Serial Clock: inoseta kuwanda kwekufambiswa kwedata muna tenzi kana kugamuchira chiratidzo chewachi mumuranda. Chaizvoizvo kurova mabhiti;
- SS, Muranda Sarudza: nerubatsiro rwechiteshi ichi, muranda anoziva kuti chimwe chinhu chiri kudiwa kubva kwaari. Pa STM32 inonzi NSS, apo N = negative, kureva. mutongi anova muranda kana paine pasi mugwara iri. Inosanganiswa zvakanaka neOpen Drain Output modhi, asi ndiyo imwe nyaya.
Sezvimwe zvese, SPI paSTM32 yakapfuma mukushanda, izvo zvinoita kuti zvitiomere kunzwisisa. Semuenzaniso, inogona kushanda kwete chete neSPI, asiwo neI2S interface, uye mune zvinyorwa zvinyorwa zvavo zvinosanganiswa, zvakakosha kugura kuwandisa panguva yakakodzera. Basa redu rakanyanya kupusa: isu tinongoda kutumira data tichishandisa MOSI uye SCK chete. Tinoenda kuchikamu 25.3.4 (half-duplex communication, half-duplex communication), kwatinowana 1 wachi uye 1 unidirectional data waya (1 wachi chiratidzo uye 1 unidirectional data rwizi):
Mune iyi modhi, chishandiso chinoshandisa SPI mune chero kutumira-chete kana kugamuchira-chete modhi. / Transmit-chete modhi yakafanana neye duplex modhi: data inofambiswa pane yekufambisa pini (MOSI mune master modhi kana MISO mune yenhapwa modhi), uye pini yekugamuchira (MISO kana MOSI zvichiteerana) inogona kushandiswa seyenguva dzose I/O pini. . Mune ino kesi, chishandiso chinongoda kufuratira iyo Rx buffer (kana ikaverengwa, hapazove nekufambiswa data ipapo).
Yakakura, pini yeMISO ndeyemahara, ngatibatanidzei chiratidzo cheLAT kwairi. Ngatitarisei Slave Select, iyo paSTM32 inogona kudzorwa zvakarongwa, zviri nyore kwazvo. Tinoverenga ndima yezita rimwechete muchikamu 25.3.1 SPI General Tsanangudzo:
Software control NSS (SSM = 1) / Ruzivo rwekusarudzwa kwevaranda rwuri muSSI bit yeSPI_CR1 rejisita. Pini yeNSS yekunze inoramba yakasununguka kune zvimwe zvinodiwa zvekushandisa.
Yasvika nguva yekunyorera kumarejista. Ndakafunga kushandisa SPI2, tsvaga kero yayo mudhetabheti - muchikamu 3.3 Memo Memo:
Zvakanaka, ngatitange:
#define _SPI2_(mem_offset) (*(volatile uint32_t *)(0x40003800 + (mem_offset)))Vhura chikamu 25.3.3 ine zita rinotsanangura wega "Kugadzira SPI muMadhi Mode":
1. Seta serial wachi frequency nemabits BR[2:0] mu SPI_CR1 register.
Marejista anounganidzwa muchikamu chebhuku rezita rezita rimwechete. Kero shift (Kero offset) yeCR1 - 0x00, nekusarudzika mabits ese anocheneswa (Reset kukosha 0x0000):
Iyo BR bits inoisa controller wachi divider, nekudaro ichitarisa frequency iyo SPI ichashanda. Yedu STM32 frequency ichave 72 MHz, mutyairi we LED, zvinoenderana nedatateta rayo, anoshanda neakawanda anosvika 25 MHz, saka isu tinofanirwa kupatsanura neina (BR[2:0] = 001).
#define _SPI_CR1 0x00
#define BR_0 0x0008
#define BR_1 0x0010
#define BR_2 0x0020
_SPI2_ (_SPI_CR1) |= BR_0;// pclk/42. Seta mabhiti eCPOL neCPHA kuti atsanangure hukama huripo pakati pekutumira data uye serial wachi yenguva (ona dhayagiramu iri papeji 240)
Sezvo isu tiri kuverenga dhetadheti pano uye tisiri kutarisa schematics, ngatitarisei zvakadzama tsananguro yemavara eCPOL neCPHA bits pane peji 704 (SPI General Tsananguro):
Chikamu chewachi uye polarity
Uchishandisa CPOL neCPHA bits yeSPI_CR1 rejista, unogona kusarudza nehurongwa hukama hwenguva. Iyo CPOL (wachi polarity) bit inodzora mamiriro echiratidzo chewachi kana pasina data iri kufambiswa. Ichi chidiki chinodzora tenzi nevaranda modes. Kana CPOL ikagadziriswazve, pini yeSCK yakaderera mukuzorora. Kana iyo CPOL bit ikaiswa, iyo SCK pini yakakwira panguva yekuzorora modhi.
Kana iyo CPHA (wachi chikamu) bhiti yaiswa, iyo yakakwira bit trap strobe ndiyo yechipiri mupendero weiyo SCK chiratidzo (inodonha kana CPOL yakajeka, ichikwira kana CPOL yakaiswa). Iyo data inotorwa neyechipiri shanduko muchiratidzo chewachi. Kana iyo CPHA bhiti yakajeka, iyo yakakwira bit trap strobe ndiyo inokwira kumucheto kweiyo SCK chiratidzo (inodonha inodonha kana CPOL yakaiswa, inokwira kumucheto kana CPOL yakacheneswa). Data inotorwa pakuchinja kwekutanga muchiratidzo chewachi.
Tatora ruzivo urwu, tinosvika pamhedzisiro yekuti ese ari maviri mabits anofanira kuramba ari zeros, nekuti Tinoda kuti SCK siginecha irambe yakaderera kana isiri mukushandiswa, uye data riendeswe pamucheto unokwira wepulse (ona Fig. Rising Edge muDM634 data).
Nenzira, pano takatanga kusangana nemhando yemazwi mu ST datasheets: mukati mavo mutsara wekuti "reset iyo bit kusvika zero" yakanyorwa. kugadzirisa zvishomaasi kwete kujekesa zvishoma, semuenzaniso, Atmega.
3. Isa iyo DFF bit kuti uone kana iyo data block iri 8-bit kana 16-bit fomati
Ndakanyatsotora 16-bit DM634 kuitira kuti ndisazvinetse nekutumira 12-bit PWM data, seDM633. Zvine musoro kuseta DFF kune imwe:
#define DFF 0x0800
_SPI2_ (_SPI_CR1) |= DFF; // 16-bit mode4. Gadzirisa bhiti reLSBFIRST murejista yeSPI_CR1 kuti uone chimiro chebhuroko
LSBFIRST, sekureva kwezita rayo, inogadzirisa kutapurirana nechinhu chidiki chakakosha kutanga. Asi DM634 inoda kugashira data kutanga kubva kune inonyanya kukosha. Nokudaro, tinoisiya ichigadziriswa.
5. Mune hardware mode, kana kupinza kubva paNSS pini kuchidiwa, shandisa chiratidzo chepamusoro kuNSS pin panguva yese ye byte transfer sequence. Mune NSS software modhi, isa iyo SSM uye SSI mabhiti muSPI_CR1 rejisita. Kana pini yeNSS ichizoshandiswa sekuburitsa, chete chidimbu cheSSO chinoda kuiswa.
Isa SSM neSSI kukanganwa nezveNSS hardware modhi:
#define SSI 0x0100
#define SSM 0x0200
_SPI2_ (_SPI_CR1) |= SSM | SSI; //enable software control of SS, SS high6. Mabhiti eMSTR neSPE anofanira kusetwa (anoramba akaiswa chete kana chiratidzo cheNSS chiri pamusoro)
Chaizvoizvo, neaya mabheti tinosarudza SPI yedu seshe uye nekuibatidza:
#define MSTR 0x0004
#define SPE 0x0040
_SPI2_ (_SPI_CR1) |= MSTR; //SPI master
//ΠΊΠΎΠ³Π΄Π° Π²ΡΠ΅ Π³ΠΎΡΠΎΠ²ΠΎ, Π²ΠΊΠ»ΡΡΠ°Π΅ΠΌ SPI
_SPI2_ (_SPI_CR1) |= SPE;SPI inogadziriswa, ngatingonyora mabasa anotumira mabheti kumutyairi. Ramba uchiverenga 25.3.3 "Kugadzirisa SPI mune master mode":
Data transfer order
Kutumira kunotanga kana byte yanyorerwa kuTx buffer.
Iyo data byte inoiswa mune yekuchinja rejista pa parallel modhi (kubva mubhazi remukati) panguva yekufambisa kwekutanga bhiti, mushure meiyo inotumirwa kune sequential MOSI pini modhi, yekutanga kana yekupedzisira zvishoma kumberi zvichienderana nekumisikidzwa kweLSBFIRST bit muCPI_CR1 rejista. Mureza weTXE unoiswa mushure mekutapurirana data kubva kuTx buffer kuenda kushift register, uye zvakare inogadzira kukanganisa kana iyo TXEIE bit muCPI_CR1 rejista yaiswa.
Ndakasimbisa mazwi mashoma mushanduro yekukwevera kutarisa kune chimwe chimiro chekushandiswa kweSPI muvatongi veSTM. PaAtmega mureza weTXE (Tx Empty, Tx haina chinhu uye yakagadzirira kugamuchira data) inoiswa chete mushure mekunge iyo byte yese yatumirwa kunze. Uye heino mureza uyu wakaiswa mushure mekunge iyo byte yaiswa mukati meshift register. Sezvo ichisundirwa ipapo nemabhiti ese panguva imwe chete (pamwe chete), uyezve iyo data inofambiswa sequentially, TXE inogadzikwa iyo byte isati yatumirwa zvachose. Izvi zvakakosha nekuti munyaya yemutyairi wedu we LED, tinoda kudhonza pini yeLAT mushure mekutumira Π²ΡΠ΅Ρ data, i.e. Mureza weTXE wega hauzokwane kwatiri.
Izvi zvinoreva kuti tinoda mumwe mureza. Ngatitarisei 25.3.7 - "Status Mireza":
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BUSY mureza
Iyo BSY mureza inoiswa uye yakacheneswa nehardware (kunyora kwairi haina mhedzisiro). Iyo BSY mureza inoratidza mamiriro eiyo SPI yekutaurirana layer.
Inogadzirisa:
kana kutamiswa kwapera (kunze kwe master mode kana kuchinjisa kuchienderera mberi)
apo SPI yakaremara
kana master mode kukanganisa kukaitika (MODF=1)
Kana kuchinjisa kusinga enderere mberi, iyo BSY mureza inocheneswa pakati pega rega rekufambisa data
Zvakanaka, izvi zvichauya zvakanaka. Ngationei kuti Tx buffer iripi. Kuti uite izvi, verenga "SPI Data Register":
Bits 15:0 DR[15:0] Data Register
Data yakagamuchirwa kana kuti data inofanira kuendeswa.
Rejista yedata yakakamurwa kuita mabhafa maviri - imwe yekunyora (kutumira buffer) uye imwe yekuverenga (gashira buffer). Kunyorera kurejista yedata kunonyorera kuTx buffer, uye kuverenga kubva kurejista yedata kunodzosera kukosha kuri muRx buffer.
Zvakanaka, uye rejista yemamiriro, uko TXE neBSY mireza inowanikwa:
Tinonyora:
#define _SPI_DR 0x0C
#define _SPI_SR 0x08
#define BSY 0x0080
#define TXE 0x0002
void dm_shift16(uint16_t value)
{
_SPI2_(_SPI_DR) = value; //send 2 bytes
while (!(_SPI2_(_SPI_SR) & TXE)); //wait until they're sent
}Zvakanaka, sezvo tichida kufambisa ka16 kaviri mabyte, zvichienderana nehuwandu hwe LED driver driver, chimwe chinhu chakadai:
void sendLEDdata()
{
LAT_low();
uint8_t k = 16;
do
{ k--;
dm_shift16(leds[k]);
} while (k);
while (_SPI2_(_SPI_SR) & BSY); // finish transmission
LAT_pulse();
}Asi isu hatizive kudhonza pini yeLAT parizvino, saka tichadzokera kuI / O.
Kugovera mapini
Mu STM32F1, marejista ane chekuita nemamiriro epini haana kujairika. Zviri pachena kuti kune akawanda avo kupfuura Atmega, asi ivo vakasiyanawo nemamwe STM chips. Chikamu 9.1 Tsanangudzo Yese yeGPIO:
Chimwe nechimwe chechinangwa chikuru I / O ports (GPIO) ine maviri 32-bit configuration register (GPIOx_CRL uye GPIOx_CRH), maviri 32-bit data rejista (GPIOx_IDR uye GPIOx_ODR), 32-bit set/reset rejista (GPIOx_BSRR), 16-bit reset register (GPIOx_BRR) uye 32- bit blocking register (GPIOx_LCKR).
Marejista maviri ekutanga haana kujairika, uye zvakare haakodzeri, nekuti 16 mapini echiteshi akapararira paari mune "mabhiti mana pahama". Avo. mapini zero kusvika kunomwe ari muCRL, uye mamwe ari muCRH. Panguva imwecheteyo, marejista akasara anobudirira ane mabheti emapini ese echiteshi - kazhinji akasara hafu "akachengetwa".
Kuti zvive nyore, ngatitange kubva panoperera rondedzero.
Hatidi rejista yekuvharisa.
Iyo seti uye reset marejista anosekesa mukuti anoteedzerana zvishoma: unogona kunyora zvese muBSRR, uko yakakwirira 16 bits ichaisazve pini kusvika zero, uye iyo yepasi ichaiswa ku1, kana iwe unogona zvakare. shandisa BRR, iyo yakaderera 16 bits iyo inongogadzirisa pini . Ndinoda yechipiri sarudzo. Aya marejista akakosha nekuti anopa mukana weatomu kumapini:
Atomic Seta kana Reset
Hapana chikonzero chekudzima zvinokanganisa kana chirongwa GPIOx_ODR chiri padiki nhanho: bhiti rimwe kana anopfuura anogona kuchinjwa neatomu imwe yekunyora kushanda APB2. Izvi zvinowanikwa nekunyora "1" kune set/reset register (GPIOx_BSRR kana, yekusetazve chete, GPIOx_BRR) yebhiti rinoda kuchinjwa. Mamwe mabhiti acharamba asina kuchinjwa.
Marejista edata ane mazita anozvitsanangura - IDR = chiyamuro Rejista yenzira, rejista yekupinda; ODR = goho Rejista yeDirection, register yekubuda. Hatizovada muchirongwa chiripo.
Uye pakupedzisira, kudzora marejista. Sezvo isu tichifarira yechipiri SPI pini, iyo PB13, PB14 uye PB15, isu tinobva tatarisa CRH:
Uye isu tinoona kuti isu tichazoda kunyora chimwe chinhu mumabits kubva pa20 kusvika 31.
Isu takatofunga pamusoro pezvatinoda kubva pamapini, saka pano ini ndichaita pasina skrini, ndichangoti MODE inotsanangura gwara (yekuisa kana mabhiti ese akaiswa ku0) uye pini kumhanya (tinoda 50MHz, i.e. zvose pini ku "1"), uye CNF inogadzirisa maitiro: nguva dzose "push-pull" - 00, "alternative" - ββ10. Nokusingaperi, sezvatinoona pamusoro apa, pini dzose dzine chikamu chechitatu kubva pasi (CNF0), inovaisa mumodhi inoyangarara kupinda.
Sezvo ini ndichironga kuita chimwe chinhu neichi chip, kuti zvive nyore ndakatsanangura zvese zvinogoneka zveMODE uye CNF kukosha kune ese ari epasi uye epamusoro ekudzora marejista.
Neimwe nzira seizvi
#define CNF0_0 0x00000004
#define CNF0_1 0x00000008
#define CNF1_0 0x00000040
#define CNF1_1 0x00000080
#define CNF2_0 0x00000400
#define CNF2_1 0x00000800
#define CNF3_0 0x00004000
#define CNF3_1 0x00008000
#define CNF4_0 0x00040000
#define CNF4_1 0x00080000
#define CNF5_0 0x00400000
#define CNF5_1 0x00800000
#define CNF6_0 0x04000000
#define CNF6_1 0x08000000
#define CNF7_0 0x40000000
#define CNF7_1 0x80000000
#define CNF8_0 0x00000004
#define CNF8_1 0x00000008
#define CNF9_0 0x00000040
#define CNF9_1 0x00000080
#define CNF10_0 0x00000400
#define CNF10_1 0x00000800
#define CNF11_0 0x00004000
#define CNF11_1 0x00008000
#define CNF12_0 0x00040000
#define CNF12_1 0x00080000
#define CNF13_0 0x00400000
#define CNF13_1 0x00800000
#define CNF14_0 0x04000000
#define CNF14_1 0x08000000
#define CNF15_0 0x40000000
#define CNF15_1 0x80000000
#define MODE0_0 0x00000001
#define MODE0_1 0x00000002
#define MODE1_0 0x00000010
#define MODE1_1 0x00000020
#define MODE2_0 0x00000100
#define MODE2_1 0x00000200
#define MODE3_0 0x00001000
#define MODE3_1 0x00002000
#define MODE4_0 0x00010000
#define MODE4_1 0x00020000
#define MODE5_0 0x00100000
#define MODE5_1 0x00200000
#define MODE6_0 0x01000000
#define MODE6_1 0x02000000
#define MODE7_0 0x10000000
#define MODE7_1 0x20000000
#define MODE8_0 0x00000001
#define MODE8_1 0x00000002
#define MODE9_0 0x00000010
#define MODE9_1 0x00000020
#define MODE10_0 0x00000100
#define MODE10_1 0x00000200
#define MODE11_0 0x00001000
#define MODE11_1 0x00002000
#define MODE12_0 0x00010000
#define MODE12_1 0x00020000
#define MODE13_0 0x00100000
#define MODE13_1 0x00200000
#define MODE14_0 0x01000000
#define MODE14_1 0x02000000
#define MODE15_0 0x10000000
#define MODE15_1 0x20000000Mapini edu ari pachiteshi B (kero yekutanga - 0x40010C00), kodhi:
#define _PORTB_(mem_offset) (*(volatile uint32_t *)(0x40010C00 + (mem_offset)))
#define _BRR 0x14
#define _BSRR 0x10
#define _CRL 0x00
#define _CRH 0x04
//ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΠ΅ΠΌ ΡΡΠ°Π½Π΄Π°ΡΡΠ½ΡΠΉ SPI2: MOSI Π½Π° B15, CLK Π½Π° B13
//LAT ΠΏΡΡΡΡ Π±ΡΠ΄Π΅Ρ Π½Π° Π½Π΅ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΠ΅ΠΌΠΎΠΌ MISO β B14
//ΠΎΡΠΈΡΠ°Π΅ΠΌ Π΄Π΅ΡΠΎΠ»ΡΠ½ΡΠΉ Π±ΠΈΡ, ΠΎΠ½ Π½Π°ΠΌ ΡΠΎΡΠ½ΠΎ Π½Π΅ Π½ΡΠΆΠ΅Π½
_PORTB_ (_CRH) &= ~(CNF15_0 | CNF14_0 | CNF13_0 | CNF12_0);
//Π°Π»ΡΡΠ΅ΡΠ½Π°ΡΠΈΠ²Π½ΡΠ΅ ΡΡΠ½ΠΊΡΠΈΠΈ Π΄Π»Ρ MOSI ΠΈ SCK
_PORTB_ (_CRH) |= CNF15_1 | CNF13_1;
//50 ΠΠΡ, MODE = 11
_PORTB_ (_CRH) |= MODE15_1 | MODE15_0 | MODE14_1 | MODE14_0 | MODE13_1 | MODE13_0;Uye, maererano, iwe unogona kunyora tsananguro dzeLAT, iyo inozotenderedzwa neBRR uye BSRR marejista:
/*** LAT pulse β high, then low */
#define LAT_pulse() _PORTB_(_BSRR) = (1<<14); _PORTB_(_BRR) = (1<<14)
#define LAT_low() _PORTB_(_BRR) = (1<<14)(LAT_low nekungoita inertia, zvagara zvakadaro, ngazvigare)
Iye zvino zvinhu zvose zvakanaka, asi hazvishande. Nekuti iyi STM32, ivo vanochengetedza magetsi, zvinoreva kuti iwe unofanirwa kugonesa kuvharika kweiyo inodiwa peripherals.
Batidza wachi
Iyo wachi, inozivikanwawo se Clock, ine basa rekuwachisa. Uye isu tatoona chidimbu cheRCC. Isu tinozvitsvaga mune zvinyorwa: iyi Reset uye Clock Control.
Sezvambotaurwa pamusoro apa, nerufaro, chikamu chakaomesesa chemusoro wewachi chakaitirwa isu nevanhu vanobva kuSTM, iyo yatinovatenda zvikuru (kamwe zvakare ini ndichapa chinongedzo kune. , kuti ijekese kuti inovhiringika sei). Isu tinongoda marejista ane basa rekugonesa peripheral wachi (Peripheral Clock Enable Registers). Chekutanga, ngatitsvage kero yekutanga yeRCC, iri pakutanga kwe "Memory Mepu":
#define _RCC_(mem_offset) (*(volatile uint32_t *)(0x40021000 + (mem_offset)))Uye wobva wadzvanya pane chinongedzo chaunoyedza kutsvaga chimwe chinhu mundiro, kana, zvirinani, enda kuburikidza netsananguro dzezvinyorwa zvinogonesa kubva muzvikamu nezve. gonesa marejista. Kwatinowana RCC_APB1ENR neRCC_APB2ENR:
Uye ivo, maererano, vane zvimedu zvinosanganisira wachi yeSPI2, IOPB (I/O Port B) uye mamwe mabasa (AFIO).
#define _APB2ENR 0x18
#define _APB1ENR 0x1C
#define IOPBEN 0x0008
#define SPI2EN 0x4000
#define AFIOEN 0x0001
//Π²ΠΊΠ»ΡΡΠ°Π΅ΠΌ ΡΠ°ΠΊΡΠΈΡΠΎΠ²Π°Π½ΠΈΠ΅ ΠΏΠΎΡΡΠ° B ΠΈ Π°Π»ΡΡ. ΡΡΠ½ΠΊΡΠΈΠΉ
_RCC_(_APB2ENR) |= IOPBEN | AFIOEN;
//Π²ΠΊΠ»ΡΡΠ°Π΅ΠΌ ΡΠ°ΠΊΡΠΈΡΠΎΠ²Π°Π½ΠΈΠ΅ SPI2
_RCC_(_APB1ENR) |= SPI2EN;Iyo yekupedzisira kodhi inogona kuwanikwa .
Kana uine mukana uye chido chekuedza, zvino batanidza DM634 seizvi: DAI kuPB15, DCK kuPB13, LAT kuPB14. Isu tinosimbisa mutyairi kubva ku5 volts, usakanganwa kubatanidza nzvimbo.
STM8 PWM
PWM pa STM8
Pandakanga ndichangoronga chinyorwa ichi, ndakasarudza, semuenzaniso, kuedza kudzidzira humwe kushanda kwechiputi chisingazivikanwi uchishandisa database chete, kuitira kuti ndirege kuguma neshangu ndisina shangu. STM8 yaive yakanakira basa iri: chekutanga, ndaive nemabhodhi eChinese akati wandei ane STM8S103, uye chechipiri, haina kufarirwa zvakanyanya, uye saka muedzo wekuverenga nekutsvaga mhinduro paInternet unoenderana nekushaikwa kwemhinduro idzi.
Chipi chinewo ΠΈ , mune yekutanga kune pinout uye rejista kero, mune yechipiri - zvimwe zvese. STM8 yakarongedzwa muC mune inotyisa IDE .
Kuvhara uye I/O
Nekusagadzikana, STM8 inoshanda pane frequency ye2 MHz, izvi zvinofanirwa kugadziriswa nekukasira.
HSI (High Speed ββββInternal) Clock
Iyo HSI wachi chiratidzo inotorwa kubva mukati 16 MHz RC oscillator ine programmable divider (1 kusvika 8). Yakaiswa murejista yewachi divider (CLK_CKDIVR).
Cherechedza: pakutanga, HSI RC oscillator ine divider ye8 inosarudzwa seyo inotungamira sosi yechiratidzo chewachi.
Isu tinowana kero yerejista mudhetabheti, tsananguro mune refman uye tinoona kuti rejista inoda kucheneswa:
#define CLK_CKDIVR *(volatile uint8_t *)0x0050C6
CLK_CKDIVR &= ~(0x18);Sezvo isu tichizomhanyisa PWM nekubatanidza maLED, ngatitarisei pinout:
Iyo chip idiki, mabasa mazhinji anomiswa pamapini akafanana. Izvo zviri mumabhuraketi e "alternative performance", inoshandurwa ne "option bytes" (sarudzo bytes) - chimwe chinhu chakaita seAtmega fuses. Iwe unogona kushandura maitiro avo nenzira, asi hazvidiwi, nekuti Iko kushanda kutsva kunoitwa chete mushure mekutangwazve. Zviri nyore kushandisa ST Visual Programmer (yakadhawunirodha neVisual Develop), inogona kushandura aya mabheti. Iyo pinout inoratidza kuti CH1 uye CH2 mapini ekutanga timer akavanzwa mumabhuraketi akaenzana; zvinodikanwa kuseta iyo AFR1 uye AFR0 bits muSTVP, uye yechipiri ichaendesawo CH1 kubuda kweyechipiri timer kubva kuPD4 kuenda kuPC5.
Saka, mapini matanhatu achadzora ma LED: PC6, PC6 uye PC7 yekutanga timer, PC3, PD5 uye PA3 yechipiri.
Kumisikidza mapini eI/O pachawo paSTM8 zviri nyore uye zvine musoro pane STM32:
- inozivikanwa kubva kuAtmega DDR data direction register (Data Direction Register): 1 = zvabuda;
- yekutanga yekudzora rejista CR1, kana yabuda, inoseta iyo yekudhonza-kudhonza modhi (1) kana yakavhurika dhizaini (0); sezvo ini ndichibatanidza ma LED kune chip nema cathodes, ndinosiya zero pano;
- yechipiri yekudzora rejista CR2, kana yabuda, inoisa kumhanya kwewachi: 1 = 10 MHz
#define PA_DDR *(volatile uint8_t *)0x005002
#define PA_CR2 *(volatile uint8_t *)0x005004
#define PD_DDR *(volatile uint8_t *)0x005011
#define PD_CR2 *(volatile uint8_t *)0x005013
#define PC_DDR *(volatile uint8_t *)0x00500C
#define PC_CR2 *(volatile uint8_t *)0x00500E
PA_DDR = (1<<3); //output
PA_CR2 |= (1<<3); //fast
PD_DDR = (1<<3); //output
PD_CR2 |= (1<<3); //fast
PC_DDR = ((1<<3) | (1<<5) | (1<<6) | (1<<7)); //output
PC_CR2 |= ((1<<3) | (1<<5) | (1<<6) | (1<<7)); //fastPWM kugadzirisa
Kutanga, ngatitsanangure mazwi:
- PWM Kakawanda - frequency iyo iyo timer inobata;
- Auto-reload, AR - autoloadable kukosha kusvika iyo iyo timer ichaverengera (pulse nguva);
- Gadziridza Chiitiko, UEV - chiitiko chinoitika kana timer yaverenga kusvika kuAR;
- PWM Duty Cycle - PWM yebasa kutenderera, inowanzonzi "basa chinhu";
- Bata/Enzanisa Kukosha - kukosha kwekutora / kuenzanisa, iyo iyo timer yakaverengerwa achaita chimwe chinhu (munyaya yePWM, inoshandura chiratidzo chekubuda);
- Preload Value - preloaded value. Enzanisa kukosha haigone kuchinja apo timer iri kukwenya, zvikasadaro kutenderera kwePWM kuchatyoka. Naizvozvo, hutsva hutsva hunotapurirana hunoiswa mubuffer uye hunodhonzwa kunze kana iyo timer inosvika kumagumo ekuverengera kwayo uye inogadzikiswazve;
- Edge-yakarongedzwa ΠΈ Pakati-yakarongedzerwa modes - kurongeka pamwe nemuganhu uye nechepakati, zvakafanana neAtmel's Kurumidza PWM ΠΈ Chikamu-chakarurama PWM.
- OCiREF, Output Enzanisa Reference Chiratidzo -referensi yekubuda chiratidzo, kutaura zvazviri, izvo zvinoonekwa pane inoenderana pini muPWM modhi.
Sezvatove pachena kubva pane pinout, maviri enguva ane PWM hunyanzvi - yekutanga neyechipiri. Ose ari maviri 16-bit, yekutanga ine akawanda ekuwedzera maficha (kunyanya, anogona kuverenga zvese kumusoro uye pasi). Isu tose tinoda kushanda zvakaenzana, saka ndakafunga kutanga neyechipiri iri murombo, kuti ndisashandise netsaona chimwe chinhu chisipo. Rimwe dambudziko nderekuti tsananguro yePWM mashandiro enguva dzese mugwaro rereferenzi iri muchitsauko nezve yekutanga timer (17.5.7 PWM Mode), saka unofanirwa kusvetuka nekudzoka mukati megwaro rese nguva dzese.
PWM paSTM8 ine mukana wakakosha pamusoro pePWM paAtmega:
Muganhu Wakarongedzerwa PWM
Kugadziriswa kweakaundi kubva pasi kusvika kumusoro
Kuverenga kwepasi-kumusoro kunoshanda kana DIR bit muTIM_CR1 rejista yakabviswa
Muenzaniso:
Muenzaniso unoshandisa yekutanga PWM modhi. Iyo PWM referensi siginecha OCiREF inokwiridzirwa kureba seTIM1_CNT <TIM1_CCRi. Zvikasadaro zvinotora mwero wakaderera. Kana iyo yekuenzanisa kukosha muTIM1_CCRi rejista yakakura kupfuura iyo autoload value (TIM1_ARR rejista), iyo OCiREF chiratidzo inobatwa pa1. Kana kukosha kwekuenzanisa kuri 0, OCiREF inobatwa pa zero....
STM8 timer panguva update chiitiko anoongorora kutanga enzanisa kukosha, uye chete ipapo inoburitsa chiratidzo chechiratidzo. Atmega's timer yekutanga screws kumusoro uye yozoenzanisa, zvichikonzera compare value == 0 iyo inobuda itsono, iyo inofanirwa kubatwa neimwe nzira (semuenzaniso, nechirongwa inverting iyo logic).
Saka zvatinoda kuita: 8-bit PWM (AR == 255), kuverenga kubva pasi kusvika kumusoro, kurongeka pamwe chete nemuganhu. Sezvo magirobhu emwenje akabatana kune chip nema cathodes, iyo PWM inofanirwa kubuda 0 (LED on) kusvika. enzanisa kukosha uye 1 mushure.
Takatoverenga nezvevamwe PWM modhi, saka tinowana rejista inodiwa yenguva yechipiri nekutsvaga mubhuku rereferenzi remutsara uyu (18.6.8 - TIMx_CCMR1):
110: Chekutanga PWM modhi - kana uchiverenga kubva pasi uchienda kumusoro, chiteshi chekutanga chiri kushanda uku TIMx_CNT <TIMx_CCR1. Zvikasadaro, chiteshi chekutanga hachishande. [kuenderera mberi mugwaro racho pane kopi isina kunaka-namira kubva kunguva 1] 111: Yechipiri PWM modhi - kana uchiverenga kubva pasi kuenda kumusoro, yekutanga chiteshi haishande uku TIMx_CNT <TIMx_CCR1. Zvikasadaro, chiteshi chekutanga chinoshanda.
Sezvo ma LED akabatana neMK nemakathodhi, yechipiri modhi inokodzera isu (yekutanga zvakare, asi isu hatisati taziva izvozvo).
Bit 3 OC1PE: Gonesa pini 1 preload
0: Preload register paTIMx_CCR1 yakadzimwa. Unogona kunyorera kuTIMx_CCR1 chero nguva. Iko kukosha kutsva kunoshanda pakarepo.
1: Preload register paTIMx_CCR1 inogoneswa. Verenga / nyora mashandiro shandisa preload register. Iyo preloaded value TIMx_CCR1 inoiswa mumumvuri rejisita panguva yega yega chiitiko chekuvandudza.
*Cherechedza: Kuti PWM modhi ishande nemazvo, preload marejista anofanira kugoneswa. Izvi hazvidiwi mune imwechete chiratidzo modhi (iyo OPM bit yakaiswa muTIMx_CR1 rejista).
Zvakanaka, ngatibatidze zvese zvatinoda kune matatu chiteshi chechipiri timer:
#define TIM2_CCMR1 *(volatile uint8_t *)0x005307
#define TIM2_CCMR2 *(volatile uint8_t *)0x005308
#define TIM2_CCMR3 *(volatile uint8_t *)0x005309
#define PWM_MODE2 0x70 //PWM mode 2, 0b01110000
#define OCxPE 0x08 //preload enable
TIM2_CCMR1 = (PWM_MODE2 | OCxPE);
TIM2_CCMR2 = (PWM_MODE2 | OCxPE);
TIM2_CCMR3 = (PWM_MODE2 | OCxPE);AR ine maviri masere-bit marejista, zvese zviri nyore:
#define TIM2_ARRH *(volatile uint8_t *)0x00530F
#define TIM2_ARRL *(volatile uint8_t *)0x005310
TIM2_ARRH = 0;
TIM2_ARRL = 255;Yechipiri timer inogona kungoverenga kubva pasi kusvika kumusoro, kurongedza pamwe nemuganhu, hapana chinoda kuchinjwa. Ngatiisei frequency divider, semuenzaniso, kusvika 256. Yechipiri timer, divider yakaiswa muTIM2_PSCR rejista uye isimba rezviviri:
#define TIM2_PSCR *(volatile uint8_t *)0x00530E
TIM2_PSCR = 8;Chasara kuvhura mhedziso uye yechipiri timer pachayo. Dambudziko rekutanga rinogadziriswa nemarejista Bata/Enzanisa Bvumira: kune maviri, matatu chiteshi akapararira paari asymmetrically. Pano tinogonawo kudzidza kuti zvinokwanisika kuchinja polarity yechiratidzo, i.e. musimboti, zvaikwanisika kushandisa PWM Mode 1. Tinonyora:
#define TIM2_CCER1 *(volatile uint8_t *)0x00530A
#define TIM2_CCER2 *(volatile uint8_t *)0x00530B
#define CC1E (1<<0) // CCER1
#define CC2E (1<<4) // CCER1
#define CC3E (1<<0) // CCER2
TIM2_CCER1 = (CC1E | CC2E);
TIM2_CCER2 = CC3E;Uye pakupedzisira, isu tinotanga iyo timer muTIMx_CR1 rejista:
#define TIM2_CR1 *(volatile uint8_t *)0x005300
TIM2_CR1 |= 1;Ngatinyorei analogue yakapfava yeAnalogWrite (), iyo inoendesa iwo chaiwo maitiro kune iyo timer yekuenzanisa. Marejista anopihwa mazita anofanofungidzira Bata/Enzanisa marejista, pane maviri acho pachiteshi chega chega: iyo yakaderera-kurongeka 8 bits muTIM2_CCRxL uye iyo yepamusoro-soro muTIM2_CCRxH. Sezvo isu takagadzira 8-bit PWM, zvakakwana kunyora chete mashoma akakosha mabhiti:
#define TIM2_CCR1L *(volatile uint8_t *)0x005312
#define TIM2_CCR2L *(volatile uint8_t *)0x005314
#define TIM2_CCR3L *(volatile uint8_t *)0x005316
void setRGBled(uint8_t r, uint8_t g, uint8_t b)
{
TIM2_CCR1L = r;
TIM2_CCR2L = g;
TIM2_CCR3L = b;
}Muverengi anoteerera anozoona kuti isu tine PWM yakaremara zvishoma, isingakwanise kuburitsa zana rekuzadza (pamutengo wepamusoro we100, chiratidzo chinodzoserwa kune imwe nguva yekutenderera). Kune maLED izvi hazvina basa, uye muverengi anoteerera anogona kutofungidzira kuti angazvigadzirisa sei.
PWM pane yechipiri timer inoshanda, ngatienderere mberi kune yekutanga.
Yekutanga timer ine chaiwo mabheti mumarejista mamwe chete (kungoti izvo zvimedu zvakasara "zvakachengetwa" mune yechipiri timer zvinoshingairira kushandiswa mune yekutanga kune ese marudzi ezvinhu zvemberi). Naizvozvo, zvakakwana kuwana kero dzemarejista akafanana mudhetabheti uye kukopa kodhi. Zvakanaka, shandura kukosha kweiyo frequency divider, nekuti... yekutanga timer inoda kugamuchira kwete simba remaviri, asi chaiyo 16-bit kukosha mumarejista maviri Prescaler High ΠΈ Low. Isu tinoita zvese uye ... yekutanga timer haishande. Chii chiri kunetsa?
Dambudziko rinogona kugadziriswa chete nekutarisa kuburikidza nechikamu chose pamusoro pekutonga marejista e timer 1, kwatinotarisa iyo iyo yechipiri timer haina. Pachava 17.7.30 Break register (TIM1_BKR), apo pane zvishoma izvi:
Bvisa main output
#define TIM1_BKR *(volatile uint8_t *)0x00526D
TIM1_BKR = (1<<7);Ndizvo zvose zvechokwadi ikozvino, iyo kodhi .
STM8 Multiplex
Multiplexing paSTM8
Yechitatu mini-purojekiti ndeyekubatanidza masere eRGB maLED kune yechipiri timer muPWM modhi uye kuita kuti varatidze mavara akasiyana. Zvinobva pane pfungwa ye LED multiplexing, iyo ndeyokuti kana iwe ukabatidza nekudzima ma LED zvakanyanya, nekukurumidza, zvinoratidzika kwatiri kuti anogara akabatidzwa (kushingirira kwekuona, inertia yekuona maonero). Ndakambodaro .
Iyo algorithm yebasa inoita seizvi:
- yakabatanidza anode yekutanga RGB LED;
- kuivhenekera, kutumira zviratidzo zvinodiwa kune cathodes;
- akamirira kusvika pakupera kwePWM kutenderera;
- yakabatanidza anode yechipiri RGB LED;
- vheneka...
Zvakanaka, nezvimwewo. Zvechokwadi, nokuda kwekushanda kwakanaka kunodiwa kuti anode yakabatana uye LED "inopisa" panguva imwe chete. Zvakanaka, kana kuti. Chero zvazvingaitika, isu tinofanirwa kunyora kodhi inoburitsa kukosha mumatanho matatu echipiri timer, chinja iwo kana UEV yasvikwa, uye panguva imwe chete shandura ikozvino inoshanda RGB LED.
Sezvo LED switching iri otomatiki, isu tinofanirwa kugadzira "vhidhiyo memory" kubva iyo inovhiringidza mubati anogashira data. Iri ndiro nyore rondedzero:
uint8_t colors[8][3];Kuti uchinje ruvara rweiyo LED chaiyo, zvichave zvakakwana kuti unyore hunhu hunodiwa mune iyi rondedzero. Uye iyo shanduko ichave ine mutoro wehuwandu hweiyo inoshanda LED
uint8_t cnt;Demux
Kuti tiwedzere kuwanda, tinoda, zvisingaite, CD74HC238 demultiplexer. Demultiplexer - chip inoshandisa mushandisi mune Hardware <<. Kuburikidza nemapini matatu ekuisa (bits 0, 1 uye 2) tinoidyisa matatu-bit nhamba X, uye mukupindura inomutsa inobuda nhamba (1<<X) Izvo zvakasara zvekupinza zvechip zvinoshandiswa kuyera dhizaini yese. Isu tinoda iyi chip kwete chete kudzikisa huwandu hweakagarwa mapini eiyo microcontroller, asiwo yekuchengetedza - kuti urege netsaona kuvhura maLED akawanda kupfuura zvinogoneka uye usapisa iyo MK. Iyo chip inodhura penny uye inofanirwa kugara ichichengetwa mumusha mako mushonga kabati.
Yedu CD74HC238 ichave nebasa rekupa voltage kune anode yeinodiwa LED. Mune yakazara-yakazara-multiplex, yaizopa voltage kune koramu kuburikidza neP-MOSFET, asi mune iyi demo zvinogoneka zvakananga, nekuti. inodhonza 20 mA, maererano absolute maximum ratings mune dheta. Kubva tinoda pinouts uye iyi cheat sheet:
H = high voltage level, L = low voltage level, X - havana basa nazvo
Isu tinobatanidza E2 neE1 pasi, E3, A0, A1 uye A3 kumapini PD5, PC3, PC4 uye PC5 yeSTM8. Sezvo tafura iri pamusoro iine ese akaderera uye akakwira mazinga, isu tinogadzirisa mapini aya sepush-pull pini.
PWM
PWM pane yechipiri timer inogadziriswa nenzira imwechete seyakaitika munyaya yapfuura, ine misiyano miviri:
Kutanga, tinofanira kugonesa kuvhiringidza Update Event (UEV) iyo inodaidza basa rinoshandura iyo inoshanda LED. Izvi zvinoitwa nekuchinja bhiti Update Interrupt Enable mubhuku rine zita rekutaura
Dimbutsa regista yekugonesa
#define TIM2_IER *(volatile uint8_t *)0x005303
//enable interrupt
TIM2_IER = 1;Musiyano wechipiri une hukama nechiitiko chekuwandisa, senge ghosting - parasitic kupenya kwe diode. Muchiitiko chedu, zvinogona kuoneka nekuda kwekuti iyo timer, yakonzera kukanganisa paUEV, inoramba ichimaka, uye mubatiri anovhiringidza haana nguva yekuchinja LED nguva isati yatanga kunyora chimwe chinhu kumapini. Kuti urwise izvi, iwe uchafanirwa kushandura iyo logic (0 = yakanyanya kupenya, 255 = hapana chakavhenekerwa) uye kudzivirira yakanyanyisa basa kutenderera kukosha. Avo. ive nechokwadi chekuti mushure meUEV ma LED anobuda zvachose kune imwe PWM kutenderera.
Kuchinja polarity:
//set polarity
TIM2_CCER1 |= (CC1P | CC2P);
TIM2_CCER2 |= CC3P;Dzivisa kuseta r, g uye b kusvika 255 uye rangarira kuashandura paunenge uchiashandisa.
Inopindira
Izvo zvakakosha zvekuvhiringidza ndezvekuti mune mamwe mamiriro ezvinhu chip inomira kuita chirongwa chikuru uye inodaidza rimwe basa rekunze. Kukanganisa kunoitika nekuda kwekunze kana kwemukati pesvedzero, kusanganisira timer.
Patakatanga kugadzira chirongwa mu ST Visual Develop, kuwedzera kune main.c takagamuchira hwindo rine faira risinganzwisisike stm8_interrupt_vector.c, inosanganisirwa otomatiki muchirongwa. Mune iyi faira, basa rinopihwa kune yega yega kukanganisa NonHandledInterrupt. Tinofanira kusunga basa redu kune yatinoda kukanganisa.
Iyo database ine tafura yekuvhiringidza mavheji, kwatinowana iwo atinoda:
13 TIM2 yekuvandudza / kufashukira
14 TIM2 kubata/kuenzanisa
Isu tinofanirwa kushandura iyo LED kuUEV, saka tinoda kukanganisa #13.
Naizvozvo, kutanga, mufaira stm8_interrupt_vector.c shandura zita rekutanga rebasa rinokonzera kukanganisa Nha. 13 (IRQ13) kuti rive rako:
{0x82, TIM2_Overflow}, /* irq13 */Chechipiri, isu tichafanirwa kugadzira faira main.h nezvinotevera:
#ifndef __MAIN_H
#define __MAIN_H
@far @interrupt void TIM2_Overflow (void);
#endifUye pakupedzisira, nyora basa iri mune yako main.c:
@far @interrupt void TIM2_Overflow (void)
{
PD_ODR &= ~(1<<5); // Π²ΡΡΡΠ±Π°Π΅ΠΌ Π΄Π΅ΠΌΡΠ»ΡΡΠΈΠΏΠ»Π΅ΠΊΡΠΎΡ
PC_ODR = (cnt<<3); // Π·Π°ΠΏΠΈΡΡΠ²Π°Π΅ΠΌ Π² Π΄Π΅ΠΌΡΠ»ΡΡΠΈΠΏΠ»Π΅ΠΊΡΠΎΡ Π½ΠΎΠ²ΠΎΠ΅ Π·Π½Π°ΡΠ΅Π½ΠΈΠ΅
PD_ODR |= (1<<5); // Π²ΠΊΠ»ΡΡΠ°Π΅ΠΌ Π΄Π΅ΠΌΡΠ»ΡΡΠΈΠΏΠ»Π΅ΠΊΡΠΎΡ
TIM2_SR1 = 0; // ΡΠ±ΡΠ°ΡΡΠ²Π°Π΅ΠΌ ΡΠ»Π°Π³ Update Interrupt Pending
cnt++;
cnt &= 7; // Π΄Π²ΠΈΠ³Π°Π΅ΠΌ ΡΡΠ΅ΡΡΠΈΠΊ LED
TIM2_CCR1L = ~colors[cnt][0]; // ΠΏΠ΅ΡΠ΅Π΄Π°Π΅ΠΌ Π² Π±ΡΡΠ΅Ρ ΠΈΠ½Π²Π΅ΡΡΠΈΡΠΎΠ²Π°Π½Π½ΡΠ΅ Π·Π½Π°ΡΠ΅Π½ΠΈΡ
TIM2_CCR2L = ~colors[cnt][1]; // Π΄Π»Ρ ΡΠ»Π΅Π΄ΡΡΡΠ΅Π³ΠΎ ΡΠΈΠΊΠ»Π° Π¨ΠΠ
TIM2_CCR3L = ~colors[cnt][2]; //
return;
}Chinosara ndechekugonesa kukanganisa. Izvi zvinoitwa uchishandisa assembler command rim - iwe uchafanirwa kuitsvaga mukati :
//enable interrupts
_asm("rim");Imwe assembler command ndeye sim - inodzima zvinokanganisa. Dzinofanirwa kudzimwa apo hunhu hutsva huchinyorwa ku "vhidhiyo ndangariro", kuitira kuti kukanganisa kunokonzerwa nenguva isiriyo kusaparadze hurongwa.
Kodhi yese - .
Kana mumwe munhu akawana chinyorwa ichi chinobatsira, saka handina kunyora pasina. Ndichafara kugamuchira mhinduro uye zvirevo, ini ndichaedza kupindura zvese.
Source: www.habr.com