{"id":116638,"date":"2024-06-19T12:06:00","date_gmt":"2024-06-19T10:06:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/novosti-interneta\/reliz-pocl-6-0-s-nezavisimoj-realizacziej-standarta-opencl"},"modified":"2024-06-19T12:06:00","modified_gmt":"2024-06-19T10:06:00","slug":"reliz-pocl-6-0-s-nezavisimoj-realizacziej-standarta-opencl","status":"publish","type":"post","link":"https:\/\/prohoster.info\/sq\/blog\/novosti-interneta\/reliz-pocl-6-0-s-nezavisimoj-realizacziej-standarta-opencl","title":{"rendered":"L\u00ebshimi i PoCL 6.0 me implementimin e pavarur t\u00eb standartit OpenCL","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"
L\u00ebshimi i projektit PoCL 6.0 (Portable Computing Language OpenCL) \u00ebsht\u00eb publikuar, duke zhvilluar zbatimin e standardit OpenCL, i pavarur nga prodhuesit e p\u00ebrshpejtuesve grafik\u00eb dhe q\u00eb lejon p\u00ebrdorimin e backend-eve t\u00eb ndryshme p\u00ebr ekzekutimin e kernel-eve OpenCL n\u00eb lloje t\u00eb ndryshme procesor\u00ebsh grafik\u00eb dhe qendror\u00eb. Kodi i projektit shp\u00ebrndahet n\u00ebn licenc\u00ebn MIT. Mb\u00ebshtetet puna n\u00eb platformat X86_64, MIPS32, ARM v7, AMD HSA APU, NVIDIA GPU dhe n\u00eb disa procesor\u00eb t\u00eb specializuar ASIP (Application-Specific Instruction-set Processor) dhe TTA (Transport Triggered Architecture) me arkitektur\u00eb VLIW.<\/p>\n
Implementimi i kompilerit t\u00eb kernel-eve OpenCL \u00ebsht\u00eb nd\u00ebrtuar mbi LLVM, dhe si frontend p\u00ebr OpenCL C p\u00ebrdoret Clang. P\u00ebr t\u00eb siguruar nj\u00eb portabilitet dhe performanc\u00eb t\u00eb duhur, kompileri i kernel-eve OpenCL mund t\u00eb gjeneroj\u00eb funksione t\u00eb kombinuara, t\u00eb cilat mund t\u00eb p\u00ebrdorin burime t\u00eb ndryshme harduerike p\u00ebr paralelizimin e ekzekutimit t\u00eb kodit, si VLIW, super-skalarn\u00ebsia, SIMD, SIMT, multi-b\u00ebrthameri dhe multi-threading. Ka mb\u00ebshtetje p\u00ebr drejtor\u00ebt ICD \n(Installable Client Driver). Ka backend-e p\u00ebr t\u00eb siguruar funksionimin p\u00ebrmes CPU, ASIP (TCE\/TTA), GPU t\u00eb bazuar n\u00eb arkitektur\u00ebn HSA dhe GPU NVIDIA (p\u00ebrmes libcuda). <\/p>\n
Implementuar nj\u00eb backend t\u00eb ri cpu-tbb, i cili p\u00ebrdor bibliotek\u00ebn OneTBB, e zhvilluar nga Intel, p\u00ebr paralelizimin e operacioneve dhe planifikimin e ekzekutimit t\u00eb detyrave.\n
N\u00eb backend-in cpu, q\u00eb siguron ekzekutimin e kernel-eve OpenCL n\u00eb CPU, \u00ebsht\u00eb shtuar mb\u00ebshtetje p\u00ebr standardin e programimit paralel OpenMP, \u00ebsht\u00eb shtuar metoda clGetDeviceAndHostTimer(), dhe jan\u00eb implementuar zgjerime eksperimentale cl_pocl_svm_rect, cl_pocl_command_buffer_svm dhe cl_pocl_command_buffer_host_buffer.\n
N\u00eb backend-in LevelZero, i cili p\u00ebrdor API-n\u00eb Level Zero, lejohet krijimi i bufer\u00ebve me madh\u00ebsi m\u00eb t\u00eb madhe se 4GB, dhe jan\u00eb realizuar optimizime t\u00eb proceseve t\u00eb sinkronizimit.\n
N\u00eb backend-in CUDA jan\u00eb implementuar operacionet sub_group_shuffle dhe sub_group_shuffle_xor, dhe \u00ebsht\u00eb rritur limiti CL_DEVICE_MAX_MEM_ALLOC_SIZE.\n<\/ul>\n