{"id":56073,"date":"2020-02-04T00:00:00","date_gmt":"2020-02-03T21:00:00","guid":{"rendered":"https:\/\/prohoster.info\/blog\/blog_prohoster\/neizbezhnost-proniknoveniya-fpga-v-data-tsentry"},"modified":"2020-02-18T14:04:16","modified_gmt":"2020-02-18T11:04:16","slug":"neizbezhnost-proniknoveniya-fpga-v-data-tsentry","status":"publish","type":"post","link":"https:\/\/prohoster.info\/sq\/blog\/administrirovanie\/neizbezhnost-proniknoveniya-fpga-v-data-tsentry","title":{"rendered":"Pashmangshm\u00ebria e dep\u00ebrtimit t\u00eb FPGA n\u00eb.qendrat e t\u00eb dh\u00ebnave","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

\"Pashmangshm\u00ebria
\nNuk \u00ebsht\u00eb e nevojshme t\u00eb jesh zhvillues \u00e7ipesh p\u00ebr t\u00eb programuar p\u00ebr FPGA, ashtu si\u00e7 nuk \u00ebsht\u00eb e nevojshme t\u00eb jesh programues n\u00eb C++ p\u00ebr t\u00eb shkruar kod n\u00eb Java. Megjithat\u00eb, n\u00eb t\u00eb dy rastet, probabilisht do t\u00eb ishte e dobishme.<\/p>\n

Q\u00ebllimi i komercializimit t\u00eb t\u00eb dy teknologjive, Java dhe FPGA, \u00ebsht\u00eb p\u00ebr t\u00eb v\u00ebrtetuar deklarat\u00ebn e fundit. Lajmi i mir\u00eb p\u00ebr FPGA \u00ebsht\u00eb se me p\u00ebrdorimin e niveleve t\u00eb duhura t\u00eb abstraksionit dhe t\u00eb nj\u00eb grupi mjetesh, gjat\u00eb 35 viteve t\u00eb fundit, q\u00eb nga shpikja e pajisjes logjike t\u00eb programueshme, krijimi i algoritmeve dhe rrjedhave t\u00eb dh\u00ebnash p\u00ebr FPGA n\u00eb vend t\u00eb CPU, DSP, GPU ose ndonj\u00eb forme tjet\u00ebr t\u00eb ASIC-ve t\u00eb specializuara, po b\u00ebhet gjithnj\u00eb e m\u00eb i leht\u00eb.<\/p>\n

T\u00eb mahnitshme \u00ebsht\u00eb koha e duhur e krijimit t\u00eb tyre, duke u paraqitur pik\u00ebrisht kur CPU-t\u00eb nuk mund t\u00eb mbesin m\u00eb nj\u00eb moduli i vet\u00ebm p\u00ebr t\u00eb p\u00ebrfunduar shum\u00eb detyra \u2013 p\u00ebr nj\u00eb varg arsye. t\u00eb data-qendrave<\/a> P\u00ebr kryerjen e shum\u00eb detyrave \u2013 p\u00ebr t\u00eb gjith\u00eb llojet e arsyeve \u2013 FPGA arrit\u00ebn efikasitetin e tyre, duke ofruar performanc\u00eb, vones\u00eb t\u00eb ul\u00ebt, mund\u00ebsi rrjeti dhe memorie \u2013 mund\u00ebsi t\u00eb ndryshme t\u00eb p\u00ebrpunimit nga FPGA SoC moderne, q\u00eb p\u00ebrfaq\u00ebsojn\u00eb n\u00eb thelb sisteme t\u00eb plota t\u00eb p\u00ebrpunimit. Megjithat\u00eb, FPGA kombinohen mir\u00eb edhe me pajisje t\u00eb tjera n\u00eb sisteme hibride, dhe sipas mendimit ton\u00eb, ato sapo kan\u00eb filluar t\u00eb gjejn\u00eb vendin e tyre t\u00eb merituar n\u00eb hierarkin\u00eb e p\u00ebrpunimeve.
\n<\/a><\/noindex>
\nPrandaj, ne organizuam konferenc\u00ebn The Next FPGA Platform n\u00eb San Jose m\u00eb 22 janar. Sigurisht, nj\u00eb nga ofruesit kryesor\u00eb t\u00eb FPGA n\u00eb bot\u00eb dhe pionier n\u00eb k\u00ebt\u00eb fush\u00eb \u00ebsht\u00eb kompanija Xilinx. Ivo Bolsens, n\u00ebnkryetar i lart\u00eb dhe drejtori teknik i Xilinx, mbajti nj\u00eb prezantim n\u00eb konferenc\u00eb dhe na foli p\u00ebr mendimet e tij t\u00eb sotme n\u00eb lidhje me m\u00ebnyr\u00ebn se si Xilinx ndihmon n\u00eb krijimin e sistemeve t\u00eb p\u00ebrpunimit t\u00eb ndryshueshme p\u00ebr qendrat e t\u00eb dh\u00ebnave.<\/p>\n

Arkitekt\u00ebt sistemik\u00eb dhe programuesit kan\u00eb nevoj\u00eb p\u00ebr koh\u00eb p\u00ebr t\u00eb arritur nj\u00eb qend\u00ebr t\u00eb dh\u00ebnash t\u00eb larmishme, ku do t\u00eb paraqiten kapacitetet kompjuterike t\u00eb ndryshme, duke zgjidhur detyra p\u00ebr p\u00ebrpunim, ruajtje dhe organizimin e rrjetit. Kjo duket e nevojshme, duke pasur parasysh se ndjekja e ligjit t\u00eb Murit me p\u00ebrdorimin e ndryshimeve CMOS po b\u00ebhet gjithnj\u00eb e m\u00eb e v\u00ebshtir\u00eb. Nd\u00ebrsa gjuha jon\u00eb \u00ebsht\u00eb akoma e lidhur me CPU, dhe ende flasim p\u00ebr 'accelerimin e aplikacioneve', duke p\u00ebrfshir\u00eb p\u00ebrmir\u00ebsimin e performanc\u00ebs s\u00eb programeve krahasuar me at\u00eb q\u00eb mund t\u00eb arrihet me CPU t\u00eb vetme. Pas nj\u00ebfar\u00eb kohe, qendrat e t\u00eb dh\u00ebnave do t\u00eb shnd\u00ebrrohen n\u00eb grupe kapacitetesh p\u00ebrpunimi, ruajtjesh t\u00eb t\u00eb dh\u00ebnave dhe protokollesh q\u00eb lidhin gjith\u00e7ka s\u00eb bashku, dhe ne do t\u00eb kthehemi te terma si \u2018p\u00ebrpunim\u2019 dhe \u2018aplikacione\u2019. P\u00ebrpunimi hibrid do t\u00eb b\u00ebhet po aq normal sa sh\u00ebrbimet \u2018n\u00eb re\u2019 t\u00eb sotme, t\u00eb bazuara n\u00eb zakonsh\u00ebm ose. makinave virtuale<\/a>, dhe n\u00eb nj\u00eb moment ne do t\u00eb p\u00ebrdorim thjesht fjal\u00ebn 'p\u00ebrpunim' p\u00ebr t\u00eb p\u00ebrshkruar veprimin e tyre. N\u00eb nj\u00eb moment \u2013 dhe ndoshta ardhja e k\u00ebsaj ere do t\u00eb p\u00ebrshpejtohet nga FPGA \u2013 ne do t\u00eb fillojm\u00eb p\u00ebrs\u00ebri ta quajm\u00eb k\u00ebt\u00eb p\u00ebrpunim t\u00eb dh\u00ebnash.<\/p>\n

P\u00ebr t\u00eb integruar FPGA n\u00eb qendrat e t\u00eb dh\u00ebnave, do t\u00eb nevojitet nj\u00eb ndryshim n\u00eb m\u00ebnyr\u00ebn e t\u00eb menduarit. 'Duke menduar p\u00ebr m\u00ebnyra p\u00ebr t\u00eb acceleruar aplikacionet e sotme, duhet t\u00eb zbuloj\u00eb thelbin e asaj si ato realizohen, \u00e7far\u00eb burimesh p\u00ebrdoren, n\u00eb \u00e7far\u00eb kohe t\u00eb shpenzohet', shpjegon Bolsens. 'Duhet t\u00eb studioj\u00eb problemin e p\u00ebrgjithsh\u00ebm q\u00eb po p\u00ebrpiqeni t\u00eb zgjidhni. Shum\u00eb aplikacione q\u00eb funksionojn\u00eb sot n\u00eb qendrat e t\u00eb dh\u00ebnave jan\u00eb t\u00eb shkall\u00ebzuara, duke kapur nj\u00eb num\u00ebr t\u00eb madh burimesh. Le t\u00eb marrim si shembull t\u00eb m\u00ebsuarit makin\u00eb, q\u00eb p\u00ebrdor nj\u00eb sasi t\u00eb madhe t\u00eb nj\u00ebsive kompjuterike. Por kur flasim p\u00ebr accelerim, duhet t\u00eb mendojm\u00eb jo vet\u00ebm p\u00ebr accelerimin e p\u00ebrpunimeve, por edhe p\u00ebr accelerimin e infrastruktur\u00ebs'.<\/p>\n

P\u00ebr shembull, gjat\u00eb operacioneve t\u00eb lidhura me t\u00eb m\u00ebsuarit makin\u00eb q\u00eb Bolsens ka studiuar n\u00eb praktik\u00eb, rreth 50% e koh\u00ebs shpenzohet p\u00ebr transferimin e t\u00eb dh\u00ebnave p\u00ebrmes kapaciteteve t\u00eb shp\u00ebrndara kompjuterike, dhe vet\u00ebm gjysma tjet\u00ebr e koh\u00ebs shpenzohet p\u00ebr vet\u00eb p\u00ebrpunimin.<\/p>\n

\u00abK\u00ebtu mendoj se FPGA mund t\u00eb ndihmoj\u00eb, pasi mund t\u00eb sigurojm\u00eb optimizim si t\u00eb aspekteve t\u00eb llogaritjes ashtu edhe t\u00eb aspekteve t\u00eb transferimit t\u00eb t\u00eb dh\u00ebnave p\u00ebr aplikacionin. Dhe ne mund ta b\u00ebjm\u00eb k\u00ebt\u00eb n\u00eb nivelin e infrastruktur\u00ebs s\u00eb p\u00ebrgjithshme dhe n\u00eb nivelin e \u00e7ipit. Kjo \u00ebsht\u00eb nj\u00eb nga p\u00ebrfitimet e m\u00ebdha t\u00eb FPGA, q\u00eb lejon krijimin e rrjeteve t\u00eb komunikimit sipas nevojave specifike t\u00eb aplikacionit. Duke v\u00ebzhguar modelet tipike t\u00eb transfert\u00ebs s\u00eb t\u00eb dh\u00ebnave n\u00eb detyrat e lidhura me inteligjenc\u00ebn artificiale, nuk shoh nevoj\u00ebn p\u00ebr nj\u00eb arhitektur\u00eb komplekse t\u00eb bazuar n\u00eb switch-e. Mund t\u00eb nd\u00ebrtohet nj\u00eb rrjet me nj\u00eb fluks t\u00eb madh t\u00eb t\u00eb dh\u00ebnave. E nj\u00ebjta gj\u00eb vlen dhe p\u00ebr detyrat e trajnimit t\u00eb rrjeteve nervore \u2013 mund t\u00eb nd\u00ebrtohet nj\u00eb rrjet celular me madh\u00ebsi paketash q\u00eb p\u00ebrshtaten sipas detyr\u00ebs specifike. Duke p\u00ebrdorur FPGA, mund t\u00eb shkall\u00ebzojm\u00eb dhe p\u00ebrshtatim shum\u00eb sakt\u00eb protokollet e transferimit t\u00eb t\u00eb dh\u00ebnave dhe topologjin\u00eb e skemave p\u00ebr aplikacione specifike. Edhe n\u00eb rastin e m\u00ebsimit t\u00eb makinerive, gjithashtu \u00ebsht\u00eb e qart\u00eb se nuk na duhen numrat me pik\u00eb lundruese me sakt\u00ebsi t\u00eb dyfisht\u00eb, dhe k\u00ebt\u00eb gjithashtu mund ta p\u00ebrshtatim\u00bb.<\/p>\n

Dallimi mes FPGA dhe CPU ose ASIC-ve t\u00eb specializuara \u00ebsht\u00eb se t\u00eb fundit programohen gjat\u00eb prodhimit, dhe pas k\u00ebsaj nuk mund t\u00eb ndryshoni mendjen n\u00eb lidhje me llojet e t\u00eb dh\u00ebnave q\u00eb llogariten ose elementet e llogaritjes, ose natyr\u00ebn e fluksit t\u00eb t\u00eb dh\u00ebnave q\u00eb kalojn\u00eb p\u00ebrmes pajisjes. FPGA ju lejojn\u00eb t\u00eb rishikoni n\u00ebse kushtet e pun\u00ebs ndryshojn\u00eb.<\/p>\n

N\u00eb t\u00eb kaluar\u00ebn, ky avantazh ka qen\u00eb i shtrenjt\u00eb, kur programimi p\u00ebr FPGA ishte destinuar p\u00ebr ata t\u00eb fort\u00eb n\u00eb shpirt. Duhet t\u00eb hapni kompilator\u00ebt p\u00ebr FPGA, n\u00eb m\u00ebnyr\u00eb q\u00eb ata t\u00eb integrohen m\u00eb mir\u00eb me mjetet q\u00eb p\u00ebrdorin programuesit p\u00ebr t\u00eb krijuar aplikacione me llogaritje paralel p\u00ebr CPU n\u00eb gjuh\u00ebt C, C++ ose Python, dhe t\u00eb transferoni pjes\u00ebn e pun\u00ebs n\u00eb bibliotekat q\u00eb p\u00ebrshpejtojn\u00eb procedurat n\u00eb FPGA. Kjo \u00ebsht\u00eb ajo q\u00eb b\u00ebn staku p\u00ebr m\u00ebsimin e makinerive Vitis, q\u00eb \u00ebsht\u00eb thelbi i platformave t\u00eb tilla p\u00ebr ML si Caffe dhe TensorFlow, dhe ka biblioteka p\u00ebr t\u00eb ekzekutuar modelet e zakonshme t\u00eb AI ose p\u00ebr t\u00eb shtuar mund\u00ebsit\u00eb e FPGA n\u00eb detyra si kodimi i videove, njohja e objekteve n\u00eb video, analiza e t\u00eb dh\u00ebnave, menaxhimi i\u98ce\u9669eve financiare dhe \u00e7do bibliotek\u00eb t\u00eb jashtme.<\/p>\n

Kjo koncepcion nuk \u00ebsht\u00eb shum\u00eb ndryshe nga projekti CUDA i Nvidia, i lan\u00e7uar dhjet\u00eb vjet m\u00eb par\u00eb, dhe q\u00eb kalon llogaritjet paralel n\u00eb p\u00ebrshpejtuesit GPU, ose nga grupi i mjeteve ROCm nga AMD, ose nga premtimet e projektit Intel, OneAPI, i cili duhet t\u00eb funksionoj\u00eb n\u00eb CPU t\u00eb ndrysh\u00ebm, GPU dhe FPGA.<\/p>\n

\u00c7\u00ebshtja \u00ebsht\u00eb se si t\u00eb gjitha k\u00ebto mjete do t\u00eb lidhen s\u00eb bashku, n\u00eb m\u00ebnyr\u00eb q\u00eb \u00e7do person t\u00eb mund t\u00eb programoj\u00eb nj\u00eb grup kapacitetesh llogarit\u00ebse sipas d\u00ebshir\u00ebs. Kjo \u00ebsht\u00eb e r\u00ebnd\u00ebsishme sepse FPGA jan\u00eb b\u00ebr\u00eb m\u00eb t\u00eb komplikuara, shum\u00eb m\u00eb t\u00eb komplikuara se \u00e7do CPU q\u00eb ekziston. Ata prodhohen me proceset m\u00eb t\u00eb avancuara teknologjike dhe me teknologjit\u00eb m\u00eb moderne t\u00eb paketimit t\u00eb \u00e7ip\u00ebve. Dhe ata do t\u00eb gjejn\u00eb ni\u0161\u00ebn e tyre, sepse tashm\u00eb nuk mund t\u00eb harxhojm\u00eb kot koh\u00eb, para, energji dhe inteligjenc\u00eb - t\u00eb gjitha k\u00ebto jan\u00eb burime shum\u00eb t\u00eb shtrenjta.<\/p>\n

\u00abFPGA ofron p\u00ebrfitime teknologjike, - thot\u00eb Bolens. - Dhe kjo nuk \u00ebsht\u00eb thjesht nj\u00eb reklam\u00eb e zakonshme p\u00ebr adaptueshm\u00ebrin\u00eb dhe ri-konfigurimin. N\u00eb t\u00eb gjitha aplikacionet e r\u00ebnd\u00ebsishme \u2013 m\u00ebsimi i makinerive, analiza e grafik\u00ebve, tregtia me shpejt\u00ebsi t\u00eb lart\u00eb, etj. \u2013 ata kan\u00eb mund\u00ebsin\u00eb p\u00ebr t\u00eb adaptuar jo vet\u00ebm rrug\u00ebn e shp\u00ebrndarjes s\u00eb t\u00eb dh\u00ebnave p\u00ebr detyr\u00ebn specifike, por edhe arkitektur\u00ebn e memories \u2013 si t\u00eb dh\u00ebnat l\u00ebvizin brenda \u00e7ipit. Po ashtu, FPGA ka m\u00eb shum\u00eb memorie t\u00eb integruar se \u00e7do pajisje tjet\u00ebr. Gjithashtu, duhet t\u00eb merret parasysh se n\u00ebse nj\u00eb detyr\u00eb nuk p\u00ebrputhet n\u00eb nj\u00eb FPGA, ajo mund t\u00eb shkall\u00ebzohet n\u00eb disa \u00e7ipa, pa u p\u00ebrballur me ato mang\u00ebsi q\u00eb ju presin kur shkall\u00ebzoni detyra n\u00eb disa CPU ose GPU.
\n
Burimi: habr.com<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

\u041d\u0435 \u043d\u0443\u0436\u043d\u043e \u0431\u044b\u0442\u044c \u0440\u0430\u0437\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u043e\u043c \u0447\u0438\u043f\u043e\u0432, \u0447\u0442\u043e\u0431\u044b \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u043e\u0432\u0430\u0442\u044c \u0434\u043b\u044f FPGA, \u043a\u0430\u043a \u043d\u0435 \u043d\u0443\u0436\u043d\u043e \u0431\u044b\u0442\u044c \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0441\u0442\u043e\u043c \u043d\u0430 \u0421++, \u0447\u0442\u043e\u0431\u044b \u043f\u0438\u0441\u0430\u0442\u044c \u043a\u043e\u0434 \u043d\u0430 Java. \u041e\u0434\u043d\u0430\u043a\u043e \u0432 \u043e\u0431\u043e\u0438\u0445 \u0441\u043b\u0443\u0447\u0430\u044f\u0445, \u0432\u0435\u0440\u043e\u044f\u0442\u043d\u043e, \u044d\u0442\u043e \u0431\u0443\u0434\u0435\u0442 \u043d\u0435 \u043b\u0438\u0448\u043d\u0438\u043c. \u0426\u0435\u043b\u044c \u043a\u043e\u043c\u043c\u0435\u0440\u0446\u0438\u0430\u043b\u0438\u0437\u0430\u0446\u0438\u0438 \u043e\u0431\u0435\u0438\u0445 \u0442\u0435\u0445\u043d\u043e\u043b\u043e\u0433\u0438\u0439, Java \u0438 FPGA, \u0432 \u0442\u043e\u043c, \u0447\u0442\u043e\u0431\u044b \u043e\u043f\u0440\u043e\u0432\u0435\u0440\u0433\u043d\u0443\u0442\u044c \u043f\u043e\u0441\u043b\u0435\u0434\u043d\u0435\u0435 \u0437\u0430\u044f\u0432\u043b\u0435\u043d\u0438\u0435. \u0425\u043e\u0440\u043e\u0448\u0438\u0435 \u043d\u043e\u0432\u043e\u0441\u0442\u0438 \u0434\u043b\u044f FPGA \u2013 \u0441 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u0435\u043c \u043f\u043e\u0434\u0445\u043e\u0434\u044f\u0449\u0438\u0445 \u0443\u0440\u043e\u0432\u043d\u0435\u0439 \u0430\u0431\u0441\u0442\u0440\u0430\u043a\u0446\u0438\u0438 \u0438 \u043d\u0430\u0431\u043e\u0440\u0430 […]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":56074,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[688],"tags":[],"class_list":["post-56073","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-administrirovanie"],"aioseo_notices":[],"aioseo_head":"\n\t\t\n\t\n\t\n\t\n\t\n\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\t\t\n\n","aioseo_head_json":{"title":"\ud83e\udd47Pashmangshm\u00ebria e p\u00ebrhapjes s\u00eb FPGA n\u00eb qendrat e t\u00eb dh\u00ebnave | ProHoster","description":"Nuk duhet t\u00eb jesh zhvillues \u00e7ipash p\u00ebr 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