{"id":87136,"date":"2020-07-04T01:42:40","date_gmt":"2020-07-03T23:42:40","guid":{"rendered":"https:\/\/prohoster.info\/blog\/administrirovanie\/simulyatory-kompyuternyh-sistem-vsem-znakomyj-polnoplatformennyj-simulyator-i-nikomu-neizvestnye-potaktovyj-i-trassy"},"modified":"2020-07-04T01:42:40","modified_gmt":"2020-07-03T23:42:40","slug":"simulyatory-kompyuternyh-sistem-vsem-znakomyj-polnoplatformennyj-simulyator-i-nikomu-neizvestnye-potaktovyj-i-trassy","status":"publish","type":"post","link":"https:\/\/prohoster.info\/sq\/blog\/administrirovanie\/simulyatory-kompyuternyh-sistem-vsem-znakomyj-polnoplatformennyj-simulyator-i-nikomu-neizvestnye-potaktovyj-i-trassy","title":{"rendered":"Simulator\u00ebt e sistemeve kompjuterike: nj\u00eb simulator i njohur p\u00ebr t\u00eb gjith\u00eb dhe simulator\u00eb t\u00eb panjohur taktik\u00eb dhe t\u00eb gjurm\u00ebve","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"

N\u00eb pjes\u00ebn e dyt\u00eb t\u00eb artikullit mbi simulatoret e sistemeve kompjuterike, do t\u00eb vazhdoj t\u00eb flas n\u00eb nj\u00eb m\u00ebnyr\u00eb t\u00eb thjesht\u00eb informuese rreth simulator\u00ebve kompjuterik\u00eb, konkretisht mbi simulimin e plot\u00eb t\u00eb platformave, me t\u00eb cilin p\u00ebrballen m\u00eb s\u00eb shpeshti p\u00ebrdoruesit e zakonsh\u00ebm, si dhe mbi modelin e taktimeve dhe traset q\u00eb jan\u00eb m\u00eb t\u00eb zakonshme n\u00eb qarqet e zhvilluesve. <\/p>\n

\"Simulator\u00ebt
\n<\/a><\/noindex>
\nN\u00eb pjes\u00ebn e par\u00eb<\/a><\/noindex> Un\u00eb p\u00ebrmenda se \u00e7far\u00eb jan\u00eb simulatoret n\u00eb p\u00ebrgjith\u00ebsi, si dhe nivelet e modelimit. Tani, duke u bazuar n\u00eb ato njohuri, propozoj t\u00eb zhytemi pak m\u00eb thell\u00eb dhe t\u00eb flasim p\u00ebr simulimin e plot\u00eb t\u00eb platformave, se si t\u00eb mbledhim trase, \u00e7far\u00eb mund t\u00eb b\u00ebjm\u00eb m\u00eb pas me to, si dhe mbi emulimin mikroarkitekturor t\u00eb taktimeve. <\/p>\n

Simulatori i plot\u00eb i platform\u00ebs (full platform simulator), ose \u201cNj\u00eb n\u00eb fush\u00eb - nuk \u00ebsht\u00eb nj\u00eb luft\u00ebtar\u201d <\/h3>\n

\nN\u00ebse \u00ebsht\u00eb e nevojshme t\u00eb studiohet funksionimi i nj\u00eb pajisjeje t\u00eb ve\u00e7ant\u00eb, p\u00ebr shembull, nj\u00eb kart\u00eb rrjeti, ose t\u00eb shkruhet nj\u00eb firmware ose draguer p\u00ebr k\u00ebt\u00eb pajisje, at\u00ebher\u00eb kjo pajisje mund t\u00eb simullohet ve\u00e7mas. Megjithat\u00eb, p\u00ebrdorimi i saj n\u00eb ndarjen nga infrastruktura tjet\u00ebr nuk \u00ebsht\u00eb shum\u00eb i p\u00ebrshtatsh\u00ebm. P\u00ebr t\u00eb ekzekutuar draguerin p\u00ebrkat\u00ebs nevojitet nj\u00eb procesor qendror, memorie, qasje n\u00eb autobus p\u00ebr transferim t\u00eb t\u00eb dh\u00ebnave dhe t\u00eb tjera. P\u00ebrve\u00e7 k\u00ebsaj, nj\u00eb sistem operativ (OS) dhe nj\u00eb stek rrjeti jan\u00eb t\u00eb nevojshme p\u00ebr funksionimin e draguerit. Shtes\u00eb, mund t\u00eb nevojitet nj\u00eb gjenerator i ve\u00e7ant\u00eb paketash dhe nj\u00eb server p\u00ebr pranimin e p\u00ebrgjigjeve. <\/p>\n

Simulatori i plot\u00eb i platform\u00ebs krijon nj\u00eb mjedis p\u00ebr ekzekutimin e gjith\u00eb softuerit, i cili p\u00ebrfshin gjith\u00e7ka, nga BIOS dhe ngarkuesi deri te vet\u00eb OS dhe n\u00ebn-sistemet e saj t\u00eb ndryshme, t\u00eb tilla si steku rrjetit, draguer\u00ebt, aplikacionet e nivelit t\u00eb p\u00ebrdoruesit. P\u00ebr k\u00ebt\u00eb, ai implementon modele programore t\u00eb shumic\u00ebs s\u00eb pajisjeve t\u00eb kompjuterit: procesori dhe memorja, disku, pajisjet e input-output (tastiera, miu, ekrani), si dhe ajo karta rrjeti. <\/p>\n

M\u00eb posht\u00eb \u00ebsht\u00eb nj\u00eb diagram bllok p\u00ebr chipsetin x58 nga kompania Intel. N\u00eb nj\u00eb simulator t\u00eb plot\u00eb t\u00eb platform\u00ebs p\u00ebr k\u00ebt\u00eb chipset, \u00ebsht\u00eb e nevojshme t\u00eb implementoni shumic\u00ebn e pajisjeve t\u00eb p\u00ebrmendura, p\u00ebrfshir\u00eb ato q\u00eb ndodhen brenda IOH (Input\/Output Hub) dhe ICH (Input\/Output Controller Hub), t\u00eb cilat nuk jan\u00eb vizatuar n\u00eb detaje n\u00eb diagramin bllok. Megjithat\u00eb, si\u00e7 tregon praktika, nuk ka shum\u00eb pajisje q\u00eb nuk p\u00ebrdoren nga softveri q\u00eb ne planifikojm\u00eb t\u00eb p\u00ebrmbahemi. Modelet e till\u00eb pajisjesh mund t\u00eb mos krijohen. <\/p>\n

\"Simulator\u00ebt
\n
\nM\u00eb s\u00eb shpeshti simulator\u00ebt e plot\u00eb t\u00eb platform\u00ebs zbatohen n\u00eb nivelin e instruksioneve t\u00eb procesorit (ISA, shiko artikullin e kaluar<\/a><\/noindex>). Kjo lejon q\u00eb t\u00eb krijohet relativisht shpejt dhe me kosto t\u00eb ul\u00ebt vet\u00eb simulatori. Niveli ISA \u00ebsht\u00eb gjithashtu i mir\u00eb sepse mbetet m\u00eb shum\u00eb ose m\u00eb pak konstant, n\u00eb krahasim me, p\u00ebr shembull, nivelin API\/ABI, i cili ndryshon m\u00eb shpesh. P\u00ebr m\u00eb tep\u00ebr, implementimi n\u00eb nivelin e instruksioneve lejon ekzekutimin e ashtuquajtur programi binar t\u00eb pa modifikuar, n\u00eb kuptimin q\u00eb mund t\u00eb ekzekutohet kodin e p\u00ebrgatitur pa asnj\u00eb ndryshim, ashtu si\u00e7 p\u00ebrdoret n\u00eb harduerin real. N\u00eb fjal\u00eb t\u00eb tjera, mund t\u00eb b\u00ebni nj\u00eb kopje (\u201cdump\u201d) t\u00eb hard diskut, ta p\u00ebrcaktoni at\u00eb si imazh p\u00ebr modelin n\u00eb simulatorin e plot\u00eb t\u00eb platform\u00ebs dhe \u2013 voila! \u2013 OS dhe programet e tjera ngarkohen n\u00eb simulator pa asnj\u00eb veprim shtes\u00eb. <\/p>\n

Kapasiteti i simulator\u00ebve <\/h3>\n

\"Simulator\u00ebt
\n
\nSi\u00e7 u p\u00ebrmend m\u00eb lart, vet\u00eb procesi i simulimit t\u00eb t\u00ebr\u00eb sistemit, pra t\u00eb gjitha pajisjeve t\u00eb tij, \u00ebsht\u00eb nj\u00eb aktivitet mjaft i ngadalt\u00eb. N\u00ebse implementohet gjithashtu n\u00eb nj\u00eb nivel shum\u00eb t\u00eb detajuar, p\u00ebr shembull n\u00eb at\u00eb mikroarkitekturor ose logjik, ekzekutimi do t\u00eb b\u00ebhet ekstremisht i ngadalt\u00eb. Megjithat\u00eb, niveli i instruksioneve \u00ebsht\u00eb nj\u00eb zgjedhje e p\u00ebrshtatshme dhe lejon q\u00eb OS dhe programet t\u00eb ekzekutohen me shpejt\u00ebsi t\u00eb mjaftueshme p\u00ebr t'u ndjer\u00eb komod n\u00eb nd\u00ebrveprimin me to. <\/p>\n

K\u00ebtu \u00ebsht\u00eb e p\u00ebrshtatshme t\u00eb prekim tem\u00ebn e kapacitetit t\u00eb simulator\u00ebve. Zakonisht, ai matet n\u00eb IPS (instruksione p\u00ebr sekond\u00eb), m\u00eb sakt\u00ebsisht n\u00eb MIPS (miliona IPS), q\u00eb do t\u00eb thot\u00eb numri i instruksioneve t\u00eb procesorit q\u00eb ekzekutohet nga simulatori p\u00ebr nj\u00eb sekond\u00eb. Megjithat\u00eb, shpejt\u00ebsia e simulimit varet gjithashtu nga kapaciteti i sistemit, mbi t\u00eb cilin funksionon vet\u00eb simulimi. Prandaj, ndoshta \u00ebsht\u00eb m\u00eb e sakt\u00eb t\u00eb flasim p\u00ebr \"ngadal\u00ebsim\" (slowdown) t\u00eb simulatorit n\u00eb krahasim me sistemin origjinal. <\/p>\n

Simulator\u00ebt m\u00eb t\u00eb zakonsh\u00ebm n\u00eb treg, si QEMU, VirtualBox ose VmWare Workstation, kan\u00eb performanc\u00eb t\u00eb k\u00ebnaqshme. Nj\u00eb p\u00ebrdorues mund edhe t\u00eb mos e v\u00eb re se po punon n\u00eb nj\u00eb simulator. Kjo ndodh fal\u00eb mund\u00ebsive speciale t\u00eb virtualizimit t\u00eb implementuara n\u00eb procesor\u00eb, algoritmeve t\u00eb translacionit binar dhe gj\u00ebrave t\u00eb tjera interesante. Kjo \u00ebsht\u00eb nj\u00eb tem\u00eb p\u00ebr nj\u00eb artikull t\u00eb ve\u00e7ant\u00eb, por n\u00ebse e shpjegojm\u00eb shum\u00eb shkurt, virtualizimi \u00ebsht\u00eb nj\u00eb mund\u00ebsi harduerike e procesor\u00ebve modern\u00eb q\u00eb lejon simulator\u00ebt t\u00eb mos simulojn\u00eb instruktionet, por t'i d\u00ebrgojn\u00eb ato p\u00ebr ekzekutim direkt n\u00eb procesorin real, n\u00ebse, natyrisht, arkitekturat e simulatorit dhe procesorit jan\u00eb t\u00eb ngjashme. Translacioni binar \u00ebsht\u00eb p\u00ebrkthimi i kodit t\u00eb makin\u00ebs s\u00eb mysafir\u00ebve n\u00eb kodin e hostit dhe ekzekutimi i tij n\u00eb procesorin real. Si rezultat, simulimi \u00ebsht\u00eb vet\u00ebm pak m\u00eb i ngadalsh\u00ebm, rreth 5-10 her\u00eb, dhe shpesh funksionon me t\u00eb nj\u00ebjt\u00ebn shpejt\u00ebsi si sistemi real. Megjithat\u00eb, shum\u00eb faktor\u00eb ndikojn\u00eb n\u00eb k\u00ebt\u00eb. P\u00ebr shembull, n\u00ebse duam t\u00eb simulojm\u00eb nj\u00eb sistem me disa dhjet\u00ebra procesor\u00eb, shpejt\u00ebsia do t\u00eb bjer\u00eb menj\u00ebher\u00eb disa dhjet\u00ebra her\u00eb. Nga ana tjet\u00ebr, simulator\u00ebt si Simics n\u00eb versionet e fundit mb\u00ebshtesin harduerin e mir\u00ebfillt\u00eb me shum\u00eb procesor\u00eb dhe e shp\u00ebrndajn\u00eb efektivisht pun\u00ebn e simuluar n\u00eb b\u00ebrthamat e procesorit real. <\/p>\n

N\u00ebse flasim p\u00ebr shpejt\u00ebsin\u00eb e simulimit t\u00eb mikroarkitektur\u00ebs, kjo \u00ebsht\u00eb zakonisht disa renditje, rreth 1000-10000 her\u00eb, m\u00eb e ngadalt\u00eb se ekzekutimi n\u00eb nj\u00eb kompjuter t\u00eb zakonsh\u00ebm, pa simulim. Nd\u00ebrsa realizimet n\u00eb nivelin e elementeve logjike jan\u00eb edhe m\u00eb t\u00eb ngadalta me disa renditje t\u00eb tjera. Prandaj, si emulator n\u00eb k\u00ebt\u00eb nivel p\u00ebrdoren FPGA, e cila ndihmon p\u00ebr t\u00eb rritur ndjesh\u00ebm performanc\u00ebn. <\/p>\n

Grafiku m\u00eb posht\u00eb tregon var\u00ebsin\u00eb e p\u00ebraf\u00ebrt t\u00eb shpejt\u00ebsis\u00eb s\u00eb simulimit nga detajizimi i modelit. <\/p>\n

\"Simulator\u00ebt
\n<\/p>\n

Simulimi me taktime <\/h3>\n

\nPavar\u00ebsisht shpejt\u00ebsis\u00eb s\u00eb ul\u00ebt t\u00eb ekzekutimit, simulator\u00ebt mikroarkitekturore jan\u00eb mjaft t\u00eb zakonsh\u00ebm. Modelimi i blloqeve t\u00eb brendshme t\u00eb procesorit \u00ebsht\u00eb i nevojsh\u00ebm p\u00ebr t\u00eb simuluar me sakt\u00ebsi koh\u00ebn e ekzekutimit p\u00ebr \u00e7do instruksion. K\u00ebtu mund t\u00eb ndodhin keqkuptime \u2013 sepse, si\u00e7 duket, pse thjesht nuk marrim dhe programojm\u00eb koh\u00ebn e ekzekutimit p\u00ebr \u00e7do instruksion. Por nj\u00eb simulator i till\u00eb do t\u00eb punonte shum\u00eb jo sakt\u00eb, pasi koha e ekzekutimit p\u00ebr t\u00eb nj\u00ebjtin instruksion mund t\u00eb ndryshoj\u00eb nga thirrja n\u00eb thirrje. <\/p>\n

Nj\u00eb shembuj m\u00eb i thjesht\u00eb \u00ebsht\u00eb instruksioni i qasjes n\u00eb memorie. N\u00ebse qeliza e memorjes e k\u00ebrkuar \u00ebsht\u00eb e arritshme n\u00eb cache, at\u00ebher\u00eb koha e ekzekutimit do t\u00eb jet\u00eb minimale. N\u00ebse nuk ka informacion n\u00eb cache (\"munges\u00eb cache\", cache miss), at\u00ebher\u00eb kjo do ta rris\u00eb ndjesh\u00ebm koh\u00ebn e ekzekutimit t\u00eb instruksionit. Pra, p\u00ebr nj\u00eb simulim t\u00eb sakt\u00eb, \u00ebsht\u00eb e nevojshme nj\u00eb model cache. Megjithat\u00eb, modeli i cache-it nuk \u00ebsht\u00eb i mjaftuesh\u00ebm. Procesori nuk do t\u00eb pres\u00eb thjesht p\u00ebr t\u00eb marr\u00eb t\u00eb dh\u00ebna nga memoria n\u00eb rast se ato nuk jan\u00eb n\u00eb cache. N\u00eb vend t\u00eb k\u00ebsaj, ai do t\u00eb filloj\u00eb t\u00eb ekzekutoj\u00eb instruksione t\u00eb tjera, duke zgjedhur ato q\u00eb nuk varen nga rezultati i leximit nga memoria. Kjo quhet ekzekutimi \"jasht\u00eb rendit\" (OOO, out of order execution), e nevojshme p\u00ebr t\u00eb minimizuar koh\u00ebn e pritjes s\u00eb procesorit. Marrja parasysh e t\u00eb gjitha k\u00ebtij gjat\u00eb llogaritjes s\u00eb koh\u00ebs s\u00eb ekzekutimit t\u00eb instrukcioneve do t\u00eb ndihmoj\u00eb modelimi i blloqeve p\u00ebrkat\u00ebse t\u00eb procesorit. Nd\u00ebr k\u00ebto instrukcione, t\u00eb ekzekutuara nd\u00ebrkoh\u00eb q\u00eb pritet rezultati i leximit nga memoria, mund t\u00eb ndodhet operacioni i kalimit kushtor. N\u00ebse rezultati i ekzekutimit t\u00eb kushtit nuk \u00ebsht\u00eb i njohur n\u00eb k\u00ebt\u00eb moment, p\u00ebrs\u00ebri procesori nuk e ndalon ekzekutimin, por b\u00ebn nj\u00eb \"supozim\", ekzekuton kalimin p\u00ebrkat\u00ebs dhe vazhdon t\u00eb ekzekutoj\u00eb parazgjedhjen instruksioneve nga vendi i kalimit. Nj\u00eb bllok i till\u00eb, i quajtur parashikues kalimi (branch predictor), gjithashtu duhet t\u00eb zbatohet n\u00eb simulatorin mikroarkitektural. <\/p>\n

Imazhi m\u00eb posht\u00eb tregon blloqet kryesore t\u00eb procesorit; njohja e saj nuk \u00ebsht\u00eb e detyrueshme, ajo \u00ebsht\u00eb e p\u00ebrfshir\u00eb vet\u00ebm p\u00ebr t\u00eb treguar kompleksitetin e zbatimit mikroarkitektural. <\/p>\n

\"Simulator\u00ebt
\n
\nFunksionimi i t\u00eb gjith\u00eb k\u00ebtyre blloqeve n\u00eb nj\u00eb procesor real sinkronizohet me sinjale t\u00eb ve\u00e7anta takti, ashtu si ndodh edhe n\u00eb model. Nj\u00eb simulator i till\u00eb mikroarkitekturor quhet i sakt\u00eb n\u00eb cikle (cycle accurate). Q\u00ebllimi kryesor i tij \u00ebsht\u00eb t\u00eb parashikoj\u00eb me sakt\u00ebsi performanc\u00ebn e procesorit t\u00eb zhvilluar dhe\/ose t\u00eb llogaris\u00eb koh\u00ebn e ekzekutimit t\u00eb nj\u00eb programi t\u00eb caktuar, p\u00ebr shembull, ndonj\u00eb ben\u00e7mark. N\u00ebse vlerat do t\u00eb ishin m\u00eb t\u00eb ul\u00ebta se ato t\u00eb nevojshme, do t\u00eb k\u00ebrkohej t\u00eb p\u00ebrmir\u00ebsohen algoritmet dhe blloqet e procesorit ose t\u00eb optimizohet programi. <\/p>\n

Si\u00e7 u tregua m\u00eb sip\u00ebr, simulaimi n\u00eb cikle \u00ebsht\u00eb shum\u00eb i ngadalsh\u00ebm, prandaj p\u00ebrdoret vet\u00ebm p\u00ebr hulumtimin e disa \u00e7\u00ebshtjeve t\u00eb caktuara t\u00eb funksionimit t\u00eb programit, ku \u00ebsht\u00eb e nevojshme t\u00eb dihet shpejt\u00ebsia reale e ekzekutimit t\u00eb programeve dhe t\u00eb vler\u00ebsohet performanca e ardhshme e pajisjes, prototipi i s\u00eb cil\u00ebs po simulohet. <\/p>\n

N\u00eb k\u00ebt\u00eb rast, p\u00ebr simulaimin e pjes\u00ebs tjet\u00ebr t\u00eb koh\u00ebs s\u00eb pun\u00ebs s\u00eb programit p\u00ebrdoret nj\u00eb simulator funksional. Si ndodh kjo p\u00ebrdorim i kombinuar n\u00eb praktik\u00eb? Fillimisht \u0437\u0430\u043f\u0443\u0441\u043a\u00ebsohet simulatori funksional, n\u00eb t\u00eb cilin ngarkohet sistemi operativ dhe t\u00eb gjith\u00eb e nevojsh\u00ebm p\u00ebr ekzekutimin e programit t\u00eb hulumtimit. Ne nuk jemi t\u00eb interesuar p\u00ebr vet\u00eb sistemin operativ, as p\u00ebr fazat fillestare t\u00eb \u0437\u0430\u043f\u0443\u0441\u043aimit t\u00eb programit, konfigurimin e tij dhe t\u00eb tjera. Megjithat\u00eb, ne gjithashtu nuk mund ta kalojm\u00eb k\u00ebto pjes\u00eb dhe t\u00eb kalojm\u00eb direkt n\u00eb ekzekutimin e programit nga mes. Prandaj, t\u00eb gjith\u00eb k\u00ebto etapa paraprake kalohen n\u00eb simulatorin funksional. Pas ekzekutimit t\u00eb programit deri n\u00eb momentin q\u00eb na intereson, ka dy mund\u00ebsi. Mund t\u00eb z\u00ebvend\u00ebsohet modelin me nj\u00eb model t\u00eb sakt\u00eb n\u00eb cikle dhe t\u00eb vazhdohet ekzekutimi. Re\u017eimi i simulaimit, ku p\u00ebrdoret kodi ekzekutues (dmth. skedar\u00ebt e zakonsh\u00ebm t\u00eb kompiluar t\u00eb programeve), quhet simulacioni i bazuar n\u00eb ekzekutim (execution driven simulation). Ky \u00ebsht\u00eb varianti m\u00eb i zakonsh\u00ebm i simulaimit. Gjithashtu, \u00ebsht\u00eb e mundur edhe nj\u00eb qasje tjet\u00ebr \u2013 simulimi i bazuar n\u00eb gjurm\u00eb (trace driven simulation). <\/p>\n

Simulimi i bazuar n\u00eb gjurm\u00eb <\/h3>\n

\nAi p\u00ebrb\u00ebhet nga dy hapa. Me ndihm\u00ebn e simulatorit funksional ose n\u00eb nj\u00eb sistem t\u00eb v\u00ebrtet\u00eb, mblidhen dhe regjistrohen n\u00eb nj\u00eb skedar log-un e veprimeve t\u00eb programit. Ky log quhet gjurm\u00eb (trace). N\u00eb var\u00ebsi t\u00eb asaj q\u00eb po hulumtohet, gjurma mund t\u00eb p\u00ebrfshij\u00eb instrukcionet e ekzekutueshme, adresat e memories, numrat e porteve, informacionin p\u00ebr ndalesat. <\/p>\n

Hapi tjet\u00ebr \u00ebsht\u00eb \"p\u00ebrshkrimi\" i gjurmuar, kur simuluesi me taksa lexon gjurm\u00ebn dhe ekzekuton t\u00eb gjitha udh\u00ebzimet e shkruara n\u00eb t\u00eb. N\u00eb fund, ne marrim koh\u00ebn e ekzekutimit t\u00eb k\u00ebtij seksioni t\u00eb programit, si dhe karakteristika t\u00eb ndryshme t\u00eb k\u00ebtij procesi, p\u00ebr shembull, p\u00ebrqindjen e goditjeve n\u00eb karak. <\/p>\n

Nj\u00eb ve\u00e7ori e r\u00ebnd\u00ebsishme e pun\u00ebs me gjurm\u00ebt \u00ebsht\u00eb determinizmi, dmth, duke ekzekutuar simulimin n\u00eb m\u00ebnyr\u00ebn e p\u00ebrshkruar m\u00eb lart, her\u00eb pas here ne riprodhojm\u00eb nj\u00eb sekuenc\u00eb t\u00eb nj\u00ebjt\u00eb veprimesh. Kjo ofron mund\u00ebsin\u00eb, duke ndryshuar parametrat e modelit (masat e karak, bufer\u00ebve dhe radh\u00ebve) dhe duke p\u00ebrdorur algoritme t\u00eb ndryshme t\u00eb brendshme ose duke i konfiguruar ato, t\u00eb studiojm\u00eb se si nj\u00eb ose tjet\u00ebr parametr ndikon n\u00eb performanc\u00ebn e sistemit dhe cili opsion ofron rezultatet m\u00eb t\u00eb mira. T\u00eb gjitha k\u00ebto mund t\u00eb realizohen me modelin prototip t\u00eb pajisjes deri n\u00eb krijimin e nj\u00eb prototipi t\u00eb v\u00ebrtet\u00eb harduerik. <\/p>\n

Sfidat e k\u00ebtij qasje q\u00ebndrojn\u00eb n\u00eb nevoj\u00ebn p\u00ebr nj\u00eb ekzekutim paraprak t\u00eb aplikacionit dhe mbledhjen e gjurm\u00ebs, si dhe madh\u00ebsin\u00eb e madhe t\u00eb skedarit t\u00eb gjurm\u00ebs. Nj\u00eb p\u00ebrfitim \u00ebsht\u00eb se mjafton t\u00eb modeloni vet\u00ebm pjes\u00ebn interesante t\u00eb pajisjes ose platform\u00ebs, nd\u00ebrkoh\u00eb q\u00eb simulimi i ekzekutimit k\u00ebrkon zakonisht modelin e plot\u00eb. <\/p>\n

Pra, n\u00eb k\u00ebt\u00eb artikull ne shqyrtuam ve\u00e7orit\u00eb e simulimit t\u00eb plot\u00eb t\u00eb platform\u00ebs, fol\u00ebm p\u00ebr shpejt\u00ebsin\u00eb e implementimeve n\u00eb nivele t\u00eb ndryshme, simulimin me taksa dhe gjurm\u00ebt. N\u00eb artikullin tjet\u00ebr do t\u00eb p\u00ebrshkruaj skenar\u00ebt kryesor\u00eb t\u00eb p\u00ebrdorimit t\u00eb simuluesve, si p\u00ebr q\u00ebllime personale, ashtu edhe nga pik\u00ebpamja e zhvillimit n\u00eb kompani t\u00eb m\u00ebdha.
\n
Burimi: habr.com<\/a> <\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"

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