{"id":33621,"date":"2019-10-31T21:53:47","date_gmt":"2019-10-31T18:53:47","guid":{"rendered":"https:\/\/prohoster.info\/blog\/additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620\/"},"modified":"2019-10-31T21:53:47","modified_gmt":"2019-10-31T18:53:47","slug":"additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620","status":"publish","type":"post","link":"https:\/\/prohoster.info\/sv\/blog\/administrirovanie\/additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620","title":{"rendered":"Additional Uplinks i arkitekturen av Intel C620-systemlogic","gt_translate_keys":[{"key":"rendered","format":"text"}]},"content":{"rendered":"<p>In x86-platform architecture, two complementary trends have emerged. According to one version, the focus should be on integrating computational and control resources into a single chip. The second approach advocates for the distribution of responsibilities: the processor is equipped with a powerful bus that forms a peripheral scalable ecosystem. This forms the basis for the topology of Intel C620 system logic for high-level platforms.<noindex><a rel=\"nofollow\" name=\"habracut\"><\/a><\/noindex><\/p>\n<p>The fundamental difference from the previous Intel C610 chipset lies in the expanded communication channel between the processor and the peripheral components included in the PCH chip, achieved through the use of PCIe links alongside the traditional DMI bus.<\/p>\n<p><img decoding=\"async\" alt=\"Additional Uplinks i arkitekturen av Intel C620-systemlogic\" src=\"\/wp-content\/uploads\/2019\/05\/2af049676133d77e16d11077e2f8e248.jpg\" style=\"display:block;margin: 0 auto;\" \/><br \/>\n<br \/>\nLet's take a closer look at the innovations of the Intel Lewisburg south bridge: what evolutionary and revolutionary approaches have expanded its capabilities in communication with processors?<\/p>\n<h2>Evolutionary changes in CPU-PCH communication<\/h2>\n<p>\nWithin the evolutionary approach, the main communication channel between the CPU and the south bridge, which is the DMI (Direct Media Interface) bus, has gained support for PCIe x4 Gen3 mode with a performance of 8.0 GT\/S. Previously, in the Intel C610 PCH, communication between the processor and system logic was conducted in PCIe x4 Gen 2 mode at a bandwidth of 5.0 GT\/S.<\/p>\n<p><img decoding=\"async\" alt=\"Additional Uplinks i arkitekturen av Intel C620-systemlogic\" src=\"\/wp-content\/uploads\/2019\/05\/08dca857f4b728fd7f872833efc2fb1c.jpg\" style=\"display:block;margin: 0 auto;\" \/><br \/>\n<br \/>\n<em>Comparison of the functionality of Intel C610 and C620 system logic<\/em><\/p>\n<p>Note that this subsystem is significantly more conservative than the integrated PCIe ports of the processor, which are typically used to connect GPUs and NVMe drives, where PCIe 3.0 has long been used and a transition to PCI Express Gen4 is planned.<\/p>\n<h2>Revolutionary changes in CPU-PCH communication<\/h2>\n<p>\nRevolutionary changes include the addition of new PCIe communication channels between the CPU and PCH, called Additional Uplinks. Physically, these are two PCI Express ports operating in PCIe x8 Gen3 and PCIe x16 Gen3 modes, both at 8.0 GT\/S.<\/p>\n<p><img decoding=\"async\" alt=\"Additional Uplinks i arkitekturen av Intel C620-systemlogic\" src=\"\/wp-content\/uploads\/2019\/05\/6241c0944ac8a87f8639e6ab0ffdb4c7.jpg\" style=\"display:block;margin: 0 auto;\" \/><br \/>\n<br \/>\n<em>Three buses are used for communication between the CPU and Intel C620 PCH: DMI and two PCI Express ports.<\/em><\/p>\n<p>What necessitated the revision of the existing communication topology with Intel C620? First, up to four 10GbE network controllers with RDMA functionality may be integrated into the PCH. Secondly, the encryption of network traffic and exchange with the storage subsystem is handled by a new and faster generation of Intel QuickAssist Technology (QAT) coprocessors, providing hardware support for compression and encryption. Lastly, the 'engine of innovation' \u2014 <noindex><a rel=\"nofollow\" href=\"https:\/\/composter.com.ua\/content\/insyde-budet-upravlyat-serverami-po-tehnologii-redfish-2016-10-27\" title=\"Vad \u00e4r k\u00e4nt om Innovation Engine?\">Innovation Engine<\/a><\/noindex>, som endast kommer att vara tillg\u00e4nglig f\u00f6r OEM-tillverkare.<\/p>\n<h2>Skalbarhet och flexibilitet<\/h2>\n<p>\nEn viktig egenskap \u00e4r m\u00f6jligheten att v\u00e4lja inte bara PCH-anslutningstopologi utan ocks\u00e5 prioriteringarna f\u00f6r chipets interna resurser n\u00e4r det g\u00e4ller tillg\u00e5ng till h\u00f6gkapacitets kommunikationskanaler med centralprocessorn (processorerna). Dessutom, i det speciella l\u00e4get EPO (EndPoint Only Mode), ansluts PCH i status som en vanlig PCI Express-enhet som inneh\u00e5ller 10 GbE-resurser och Intel QAT. I detta fall \u00e4r den klassiska DMI-gr\u00e4nssnittet samt ett antal legacy-under system som visas i svart i diagrammet inaktiverade.<\/p>\n<p><img decoding=\"async\" alt=\"Additional Uplinks i arkitekturen av Intel C620-systemlogic\" src=\"\/wp-content\/uploads\/2019\/05\/209043e3da8d5c394a2ef3c9174e00cd.jpg\" style=\"display:block;margin: 0 auto;\" \/><br \/>\n<br \/>\n<em>Den interna arkitektur av Intel C620 PCH-chipet<\/em><\/p>\n<p>Teoretiskt sett ger detta m\u00f6jlighet att anv\u00e4nda mer \u00e4n en Intel C620 PCH-chip i systemet och skala funktionaliteten f\u00f6r 10 GbE och Intel QAT i enlighet med prestandakrav. Legacy-funktioner, som endast \u00e4r n\u00f6dv\u00e4ndiga i ett enda exemplar, kan endast aktiveras p\u00e5 ett av de installerade PCH-chip.<\/p>\n<p>S\u00e5ledes kommer det slutgiltiga ordet i designen att tillh\u00f6ra plattformsutvecklaren, som agerar utifr\u00e5n b\u00e5de tekniska och marknadsf\u00f6ringsfaktorer i enlighet med positioneringen av varje specifik produkt.<br \/>\n<br \/>K\u00e4lla: <a content=\"nofollow\" rel=\"nofollow\" href=\"https:\/\/habr.com\/ru\/post\/451758\/\">habr.com<\/a><\/p>","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"excerpt":{"rendered":"<p>\u0412 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0435 x86-\u043f\u043b\u0430\u0442\u0444\u043e\u0440\u043c \u0432\u043e\u0437\u043d\u0438\u043a\u043b\u0438 \u0434\u0432\u0430 \u0442\u0435\u0447\u0435\u043d\u0438\u044f, \u0432\u0437\u0430\u0438\u043c\u043d\u043e \u0434\u043e\u043f\u043e\u043b\u043d\u044f\u044e\u0449\u0438\u0435 \u0434\u0440\u0443\u0433 \u0434\u0440\u0443\u0433\u0430. \u041f\u043e \u043e\u0434\u043d\u043e\u0439 \u0432\u0435\u0440\u0441\u0438\u0438, \u043d\u0443\u0436\u043d\u043e \u0434\u0432\u0438\u0433\u0430\u0442\u044c\u0441\u044f \u0432 \u0441\u0442\u043e\u0440\u043e\u043d\u0443 \u0438\u043d\u0442\u0435\u0433\u0440\u0430\u0446\u0438\u0438 \u0432 \u043e\u0434\u043d\u043e\u043c \u043a\u0440\u0438\u0441\u0442\u0430\u043b\u043b\u0435 \u0432\u044b\u0447\u0438\u0441\u043b\u0438\u0442\u0435\u043b\u044c\u043d\u044b\u0445 \u0438 \u0443\u043f\u0440\u0430\u0432\u043b\u044f\u044e\u0449\u0438\u0445 \u0440\u0435\u0441\u0443\u0440\u0441\u043e\u0432. \u0412\u0442\u043e\u0440\u043e\u0439 \u043f\u043e\u0434\u0445\u043e\u0434 \u0438\u0441\u043f\u043e\u0432\u0435\u0434\u0443\u0435\u0442 \u0440\u0430\u0441\u043f\u0440\u0435\u0434\u0435\u043b\u0435\u043d\u0438\u0435 \u043e\u0431\u044f\u0437\u0430\u043d\u043d\u043e\u0441\u0442\u0435\u0439: \u043f\u0440\u043e\u0446\u0435\u0441\u0441\u043e\u0440 \u043e\u0441\u043d\u0430\u0449\u0430\u0435\u0442\u0441\u044f \u043f\u0440\u043e\u0438\u0437\u0432\u043e\u0434\u0438\u0442\u0435\u043b\u044c\u043d\u043e\u0439 \u0448\u0438\u043d\u043e\u0439, \u0444\u043e\u0440\u043c\u0438\u0440\u0443\u044e\u0449\u0435\u0439 \u043f\u0435\u0440\u0438\u0444\u0435\u0440\u0438\u0439\u043d\u0443\u044e \u043c\u0430\u0441\u0448\u0442\u0430\u0431\u0438\u0440\u0443\u0435\u043c\u0443\u044e \u044d\u043a\u043e\u0441\u0438\u0441\u0442\u0435\u043c\u0443. \u041e\u043d \u043f\u043e\u043b\u043e\u0436\u0435\u043d \u0432 \u043e\u0441\u043d\u043e\u0432\u0443 \u0442\u043e\u043f\u043e\u043b\u043e\u0433\u0438\u0438 \u0441\u0438\u0441\u0442\u0435\u043c\u043d\u043e\u0439 \u043b\u043e\u0433\u0438\u043a\u0438 Intel C620 \u0434\u043b\u044f \u0432\u044b\u0441\u043e\u043a\u043e\u0443\u0440\u043e\u0432\u043d\u0435\u0432\u044b\u0445 \u043f\u043b\u0430\u0442\u0444\u043e\u0440\u043c. \u041f\u0440\u0438\u043d\u0446\u0438\u043f\u0438\u0430\u043b\u044c\u043d\u043e\u0435 \u043e\u0442\u043b\u0438\u0447\u0438\u0435 \u043e\u0442 \u043f\u0440\u0435\u0434\u044b\u0434\u0443\u0449\u0435\u0433\u043e \u0447\u0438\u043f\u0441\u0435\u0442\u0430 [&hellip;]<\/p>\n","protected":false,"gt_translate_keys":[{"key":"rendered","format":"html"}]},"author":1,"featured_media":25312,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[688],"tags":[],"class_list":["post-33621","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-administrirovanie"],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.4 - 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Enligt en version b\u00f6r man g\u00e5 mot integration av ber\u00e4knings- och styrresurser i ett enda kristall.","canonical_url":"https:\/\/prohoster.info\/sv\/blog\/administrirovanie\/additional-uplinks-v-arhitekture-sistemnoj-logiki-intel-c620","robots":"max-image-preview:large","keywords":"","webmasterTools":{"miscellaneous":""},"schema":null,"og:locale":"sv_SE","og:site_name":"ProHoster | \u041a\u0443\u043f\u0438\u0442\u044c \u043d\u0430\u0434\u0435\u0436\u043d\u044b\u0439 \u0445\u043e\u0441\u0442\u0438\u043d\u0433 \u0434\u043b\u044f \u0441\u0430\u0439\u0442\u043e\u0432 \u0441 \u0437\u0430\u0449\u0438\u0442\u043e\u0439 \u043e\u0442 DDoS, VPS VDS \u0441\u0435\u0440\u0432\u0435\u0440\u044b","og:type":"article","og:title":"\ud83e\udd47Additional Uplinks \u0432 \u0430\u0440\u0445\u0438\u0442\u0435\u043a\u0442\u0443\u0440\u0435 \u0441\u0438\u0441\u0442\u0435\u043c\u043d\u043e\u0439 \u043b\u043e\u0433\u0438\u043a\u0438 Intel C620 | ProHoster","og:description":"\u0412 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