Le vidiyo ibonisa: ibhodi ye-Raspberry Pi3, exhunywe kuyo nge-GPIO ikhonkco yibhodi ye-FPGA i-Mars Rover2rpi (i-Cyclone IV), apho i-HDMI monitor ixhunyiwe. Imonitha yesibini iqhagamshelwe nge-HDMI isidibanisi seRaspberry Pi3. Yonke into isebenza kunye njengenkqubo yokubeka esweni kabini.
Okulandelayo ndiza kukuxelela ukuba oku kwenziwa njani.
Ibhodi yeRaspberry Pi3 eyaziwayo inesidibanisi se-GPIO apho unokudibanisa amakhadi ahlukeneyo okwandisa: izinzwa, ii-LED, abaqhubi beemoto ezinyathelayo kunye nokunye okuninzi. Owona msebenzi wephini ngalinye kwisidibanisi uxhomekeke kuqwalaselo lwezibuko. Uqwalaselo lweGPIO ALT2 lukuvumela ukuba utshintshe isinxibelelanisi kwimowudi yojongano lweDPI, Bonisa iParallel Interface. Kukho amakhadi okwandisa okudibanisa iimonitha zeVGA ngeDPI. Nangona kunjalo, okokuqala, iimonitha ze-VGA azisekho njenge-HDMI, kwaye okwesibini, ujongano lwedijithali lungcono ngakumbi kune-analogue. Ngaphezu koko, i-DAC kwiibhodi zokwandisa zeVGA zihlala zenziwe ngohlobo lwamatyathanga e-R-2-R kwaye kaninzi azikho ngaphezu kwe-6 bits ngombala.
Kwimo ye-ALT2, izikhonkwane ze-GPIO zokudibanisa zinentsingiselo ilandelayo:
Apha ndifake imibala ye-RGB yezikhonkwane zesinxibelelanisi esibomvu, eluhlaza kunye noluhlaza okwesibhakabhaka ngokulandelelanayo. Eminye imiqondiso ebalulekileyo yimiqondiso ye-V-SYNC kunye ne-H-SYNC, kunye ne-CLK. Ubuninzi bewotshi ye-CLK bubuxhakaxhaka apho amaxabiso epixel aphuma khona kwisinxibelelanisi; kuxhomekeke kwimowudi yevidiyo ekhethiweyo.
Ukuqhagamshela i-digital HDMI monitor, kufuneka ubambe iimpawu ze-DPI ze-interface kwaye uziguqule kwiimpawu ze-HDMI. Oku kunokwenziwa, umzekelo, usebenzisa uhlobo oluthile lwebhodi yeFPGA. Njengoko kuvela, ibhodi ye-Mars Rover2rpi ifanelekile kwezi njongo. Ngokwenyani, olona khetho luphambili lokuqhagamshela le bhodi ngeadaptha ekhethekileyo ijongeka ngolu hlobo:
Le bhodi isetyenziselwa ukwandisa inani leezibuko ze-GPIO kunye nokudibanisa izixhobo ezininzi ze-peripheral kwi-raspberry. Ngexesha elifanayo, iimpawu ze-4 ze-GPIO ezinolu xhulumaniso zisetyenziselwa iimpawu ze-JTAG, ukwenzela ukuba inkqubo evela kwi-Raspberry inokulayisha i-firmware ye-FPGA kwi-FPGA. Ngenxa yoku, olu xhulumaniso lusemgangathweni alundifanelanga; Iimpawu ezi-4 zeDPI ziyaphuma. Ngethamsanqa, ii-combs ezongezelelweyo ebhodini zine-pinout ehambelana ne-Raspberry. Ke ndiyakwazi ukujikelezisa ibhodi ngeedigri ezingama-90 kwaye ndisayidibanisa neraspberry yam:
Ewe kunjalo, kuya kufuneka usebenzise umdwelisi we-JTAG wangaphandle, kodwa oku akuyongxaki.
Kusekho ingxaki encinci. Ayizizo zonke izikhonkwane zeFPGA ezinokusetyenziswa njengegalelo lewotshi. Kukho izikhonkwane ezimbalwa ezinikezelweyo ezinokuthi zisetyenziselwe ezi njongo. Ngoko kwavela apha ukuba uphawu lwe-GPIO_0 CLK alufikeleli kwigalelo leFPGA, elinokusetyenziswa njengegalelo lewotshi yeFPGA. Ngoko ke kwakusafuneka ndibeke ucingo olunye kwiqhiya. Ndiqhagamshela GPIO_0 kunye nebhodi's KEY[1] umqondiso:
Ngoku ndiza kukuxelela kancinci malunga neprojekthi yeFPGA. Ubunzima obuphambili ekuveliseni imiqondiso ye-HDMI yi-frequencies ephezulu kakhulu. Ukuba ujonga i-pinout ye-HDMI yokudibanisa, unokubona ukuba iisiginali ze-RGB ngoku zizisiginali zokwahlukana kothotho:
Ukusetyenziswa kwesignali yokwahlukana kukuvumela ukuba ulwe nokuphazamiseka kwemodi eqhelekileyo kumgca wokuhambisa. Kule meko, ikhowudi ye-original bit-bit yesignali yombala ngamnye iguqulwa ibe yi-10-bit TMDS (i-Transition-minimized differential signaling). Le yindlela ekhethekileyo yekhowudi yokususa icandelo le-DC kwisignali kunye nokunciphisa ukutshintshwa kwesignali kumgca wokwahlukana. Kuba amasuntswana ali-10 ngoku kufuneka ahanjiswe ngaphezulu komgca wesiriyali ngebhayithi enye yombala, kuye kwafumaniseka ukuba isantya sewotshi yeserializer kufuneka sibe ngaphezulu kwamaxesha ali-10 ngaphezulu kwesantya sewotshi yepixel. Ukuba sithatha umzekelo imo yevidiyo 1280x720 60Hz, ke i-pixel frequency yale modi yi-74,25 MHz. I-serializer kufuneka ibe yi-742,5 MHz.
IiFPGA eziqhelekileyo, ngelishwa, azikwazi ukwenza oku. Nangona kunjalo, ngethamsanqa kuthi, iFPGA iye yakha izikhonkwane zeDDIO. Ezi zizigqibo esele, njengokuba kunjalo, i-2-to-1 i-serializers. Oko kukuthi, banokukhupha amasuntswana amabini ngokulandelelanayo kumaphethelo anyukayo nawayo exesha lewotshi. Oku kuthetha ukuba kwiprojekthi yeFPGA ungasebenzisa hayi 740 MHz, kodwa 370 MHz, kodwa kufuneka usebenzise izinto zemveliso zeDDIO kwiFPGA. Ngoku i-370 MHz sele ifikeleleke ngokupheleleyo. Ngelishwa, imowudi ye-1280x720 ngumda. Isisombululo esiphezulu asinakufezekiswa kwi-Cyclone IV FPGA yethu efakwe kwibhodi ye-Mars Rover2rpi.
Ngoko, kuyilo, igalelo le-pixel frequency CLK liya kwi-PLL, apho liphindwe ngo-5. Kulo mzuzwana, i-R, G, B bytes iguqulwa ibe ngamabini amancinci. Yile nto eyenziwa ngumfaki khowudi we-TMDS. Ikhowudi yomthombo kwiVerilog HDL ibonakala ngolu hlobo:
module hdmi(
input wire pixclk, // 74MHz
input wire clk_TMDS2, // 370MHz
input wire hsync,
input wire vsync,
input wire active,
input wire [7:0]red,
input wire [7:0]green,
input wire [7:0]blue,
output wire TMDS_bh,
output wire TMDS_bl,
output wire TMDS_gh,
output wire TMDS_gl,
output wire TMDS_rh,
output wire TMDS_rl
);
wire [9:0] TMDS_red, TMDS_green, TMDS_blue;
TMDS_encoder encode_R(.clk(pixclk), .VD(red ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_red));
TMDS_encoder encode_G(.clk(pixclk), .VD(green), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_green));
TMDS_encoder encode_B(.clk(pixclk), .VD(blue ), .CD({vsync,hsync}), .VDE(active), .TMDS(TMDS_blue));
reg [2:0] TMDS_mod5=0; // modulus 5 counter
reg [4:0] TMDS_shift_bh=0, TMDS_shift_bl=0;
reg [4:0] TMDS_shift_gh=0, TMDS_shift_gl=0;
reg [4:0] TMDS_shift_rh=0, TMDS_shift_rl=0;
wire [4:0] TMDS_blue_l = {TMDS_blue[9],TMDS_blue[7],TMDS_blue[5],TMDS_blue[3],TMDS_blue[1]};
wire [4:0] TMDS_blue_h = {TMDS_blue[8],TMDS_blue[6],TMDS_blue[4],TMDS_blue[2],TMDS_blue[0]};
wire [4:0] TMDS_green_l = {TMDS_green[9],TMDS_green[7],TMDS_green[5],TMDS_green[3],TMDS_green[1]};
wire [4:0] TMDS_green_h = {TMDS_green[8],TMDS_green[6],TMDS_green[4],TMDS_green[2],TMDS_green[0]};
wire [4:0] TMDS_red_l = {TMDS_red[9],TMDS_red[7],TMDS_red[5],TMDS_red[3],TMDS_red[1]};
wire [4:0] TMDS_red_h = {TMDS_red[8],TMDS_red[6],TMDS_red[4],TMDS_red[2],TMDS_red[0]};
always @(posedge clk_TMDS2)
begin
TMDS_shift_bh <= TMDS_mod5[2] ? TMDS_blue_h : TMDS_shift_bh [4:1];
TMDS_shift_bl <= TMDS_mod5[2] ? TMDS_blue_l : TMDS_shift_bl [4:1];
TMDS_shift_gh <= TMDS_mod5[2] ? TMDS_green_h : TMDS_shift_gh [4:1];
TMDS_shift_gl <= TMDS_mod5[2] ? TMDS_green_l : TMDS_shift_gl [4:1];
TMDS_shift_rh <= TMDS_mod5[2] ? TMDS_red_h : TMDS_shift_rh [4:1];
TMDS_shift_rl <= TMDS_mod5[2] ? TMDS_red_l : TMDS_shift_rl [4:1];
TMDS_mod5 <= (TMDS_mod5[2]) ? 3'd0 : TMDS_mod5+3'd1;
end
assign TMDS_bh = TMDS_shift_bh[0];
assign TMDS_bl = TMDS_shift_bl[0];
assign TMDS_gh = TMDS_shift_gh[0];
assign TMDS_gl = TMDS_shift_gl[0];
assign TMDS_rh = TMDS_shift_rh[0];
assign TMDS_rl = TMDS_shift_rl[0];
endmodule
module TMDS_encoder(
input clk,
input [7:0] VD, // video data (red, green or blue)
input [1:0] CD, // control data
input VDE, // video data enable, to choose between CD (when VDE=0) and VD (when VDE=1)
output reg [9:0] TMDS = 0
);
wire [3:0] Nb1s = VD[0] + VD[1] + VD[2] + VD[3] + VD[4] + VD[5] + VD[6] + VD[7];
wire XNOR = (Nb1s>4'd4) || (Nb1s==4'd4 && VD[0]==1'b0);
wire [8:0] q_m = {~XNOR, q_m[6:0] ^ VD[7:1] ^ {7{XNOR}}, VD[0]};
reg [3:0] balance_acc = 0;
wire [3:0] balance = q_m[0] + q_m[1] + q_m[2] + q_m[3] + q_m[4] + q_m[5] + q_m[6] + q_m[7] - 4'd4;
wire balance_sign_eq = (balance[3] == balance_acc[3]);
wire invert_q_m = (balance==0 || balance_acc==0) ? ~q_m[8] : balance_sign_eq;
wire [3:0] balance_acc_inc = balance - ({q_m[8] ^ ~balance_sign_eq} & ~(balance==0 || balance_acc==0));
wire [3:0] balance_acc_new = invert_q_m ? balance_acc-balance_acc_inc : balance_acc+balance_acc_inc;
wire [9:0] TMDS_data = {invert_q_m, q_m[8], q_m[7:0] ^ {8{invert_q_m}}};
wire [9:0] TMDS_code = CD[1] ? (CD[0] ? 10'b1010101011 : 10'b0101010100) : (CD[0] ? 10'b0010101011 : 10'b1101010100);
always @(posedge clk) TMDS <= VDE ? TMDS_data : TMDS_code;
always @(posedge clk) balance_acc <= VDE ? balance_acc_new : 4'h0;
endmodule
Emva koko izibini eziphumayo zondliwa kwimveliso yeDDIO, evelisa ngokulandelelana isignali-bit enye kwimida ekhuphukayo kunye neyokwehla.
I-DDIO ngokwayo inokuchazwa ngale khowudi yeVerilog ilandelayo:
module ddio(
input wire d0,
input wire d1,
input wire clk,
output wire out
);
reg r_d0;
reg r_d1;
always @(posedge clk)
begin
r_d0 <= d0;
r_d1 <= d1;
end
assign out = clk ? r_d0 : r_d1;
endmoduleKodwa kusenokwenzeka ukuba ayizukusebenza ngaloo ndlela. Kufuneka usebenzise i-Alter's megafunction ALTDDIO_OUT ukwenza imveliso yeDDIO isebenze. Iprojekthi yam isebenzisa icandelo lethala leencwadi le-ALTDDIO_OUT.
Konke oku kusenokubonakala kukhohlisayo, kodwa kuyasebenza.
Uyakwazi ukujonga yonke ikhowudi yomthombo ebhalwe kwi-Verilog HDL .
I-firmware ehlanganisiweyo ye-FPGA ikhanya kwi-chip ye-EPCS efakwe kwibhodi ye-Mars Rover2rpi. Ngaloo ndlela, xa amandla esetyenziswa kwibhodi yeFPGA, i-FPGA iya kuqaliswa kwimemori ye-flash kwaye iqale.
Ngoku kufuneka sithethe kancinci malunga nokucwangciswa kweRaspberry ngokwayo.
Ndenza iimvavanyo kwiRaspberry PI OS (32 bit) esekwe kwiDebian Buster, Inguqulelo: ka-Agasti ka-2020,
Umhla wokukhutshwa: 2020-08-20, inguqulelo yeKernel:5.4.
Kufuneka wenze izinto ezimbini:
- hlela ifayile ye-config.txt;
- yenza uqwalaselo lomncedisi we-X ukusebenza nabahloli ababini.
Xa uhlela ifayile /boot/config.txt oyifunayo:
- khubaza ukusetyenziswa kwe-i2c, i2s, spi;
- vula imo yeDPI usebenzisa umaleko dtoverlay=dpi24;
- cwangcisa imo yevidiyo 1280 Γ 720 60Hz, iibhithi ezingama-24 ngepixel nganye kwiDPI;
- chaza inani elifunekayo le-framebuffers 2 (max_framebuffers=2, kungoko kuphela apho isixhobo sesibini siyakuvela/dev/fb1)
Okubhaliweyo okupheleleyo kwefayile ye-config.txt kukhangeleka ngolu hlobo.
# For more options and information see
# http://rpf.io/configtxt
# Some settings may impact device functionality. See link above for details
# uncomment if you get no picture on HDMI for a default "safe" mode
#hdmi_safe=1
# uncomment this if your display has a black border of unused pixels visible
# and your display can output without overscan
disable_overscan=1
# uncomment the following to adjust overscan. Use positive numbers if console
# goes off screen, and negative if there is too much border
#overscan_left=16
#overscan_right=16
#overscan_top=16
#overscan_bottom=16
# uncomment to force a console size. By default it will be display's size minus
# overscan.
#framebuffer_width=1280
#framebuffer_height=720
# uncomment if hdmi display is not detected and composite is being output
hdmi_force_hotplug=1
# uncomment to force a specific HDMI mode (this will force VGA)
#hdmi_group=1
#hdmi_mode=1
# uncomment to force a HDMI mode rather than DVI. This can make audio work in
# DMT (computer monitor) modes
#hdmi_drive=2
# uncomment to increase signal to HDMI, if you have interference, blanking, or
# no display
#config_hdmi_boost=4
# uncomment for composite PAL
#sdtv_mode=2
#uncomment to overclock the arm. 700 MHz is the default.
#arm_freq=800
# Uncomment some or all of these to enable the optional hardware interfaces
#dtparam=i2c_arm=on
#dtparam=i2s=on
#dtparam=spi=on
dtparam=i2c_arm=off
dtparam=spi=off
dtparam=i2s=off
dtoverlay=dpi24
overscan_left=0
overscan_right=0
overscan_top=0
overscan_bottom=0
framebuffer_width=1280
framebuffer_height=720
display_default_lcd=0
enable_dpi_lcd=1
dpi_group=2
dpi_mode=87
#dpi_group=1
#dpi_mode=4
dpi_output_format=0x6f027
dpi_timings=1280 1 110 40 220 720 1 5 5 20 0 0 0 60 0 74000000 3
# Uncomment this to enable infrared communication.
#dtoverlay=gpio-ir,gpio_pin=17
#dtoverlay=gpio-ir-tx,gpio_pin=18
# Additional overlays and parameters are documented /boot/overlays/README
# Enable audio (loads snd_bcm2835)
dtparam=audio=on
[pi4]
# Enable DRM VC4 V3D driver on top of the dispmanx display stack
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2
[all]
#dtoverlay=vc4-fkms-v3d
max_framebuffers=2
Emva koku, kufuneka wenze ifayile yoqwalaselo kumncedisi we-X ukuba asebenzise iimonitha ezimbini kwizakhelo ezimbini zesakhelo /dev/fb0 kunye/dev/fb1:
Ifayile yam yoqwalaselo /usr/share/x11/xorg.conf.d/60-dualscreen.conf inje
Section "Device"
Identifier "LCD"
Driver "fbturbo"
Option "fbdev" "/dev/fb0"
Option "ShadowFB" "off"
Option "SwapbuffersWait" "true"
EndSection
Section "Device"
Identifier "HDMI"
Driver "fbturbo"
Option "fbdev" "/dev/fb1"
Option "ShadowFB" "off"
Option "SwapbuffersWait" "true"
EndSection
Section "Monitor"
Identifier "LCD-monitor"
Option "Primary" "true"
EndSection
Section "Monitor"
Identifier "HDMI-monitor"
Option "RightOf" "LCD-monitor"
EndSection
Section "Screen"
Identifier "screen0"
Device "LCD"
Monitor "LCD-monitor"
EndSection
Section "Screen"
Identifier "screen1"
Device "HDMI"
Monitor "HDMI-monitor"
EndSection
Section "ServerLayout"
Identifier "default"
Option "Xinerama" "on"
Option "Clone" "off"
Screen 0 "screen0"
Screen 1 "screen1" RightOf "screen0"
EndSection
Ewe, ukuba ayikafakwa, kufuneka uyifake iXinerama. Emva koko indawo yedesktop iya kwandiswa ngokupheleleyo kwiimonitha ezimbini, njengoko kubonisiwe kwividiyo yedemo engentla.
Oko mhlawumbi konke. Ngoku, abanini beRaspberry Pi3 baya kukwazi ukusebenzisa iimonitha ezimbini.
Inkcazo kunye nomzobo wesiphaluka webhodi ye-Mars Rover2rpi inokufumaneka .
umthombo: www.habr.com