ื™ื ื˜ืขืœ ื’ืขืงื•ื™ืคื˜ ืึท ื‘ืจื™ื˜ื™ืฉ ืžื•ืžื›ืข ืื™ืŸ ื•ื•ื™ื“ืขื ืงืึธืจืขืก, AI ืื•ืŸ ML ืคึฟืึทืจ FPGAs

ื™ื ื˜ืขืœ ื”ืืœื˜ ื•ื•ื™ื™ื˜ืขืจ ืึทื’ืจืขืกื™ื•ื• ื™ืงืกืคึผืึทื ื“ ื“ื™ ืคึผืึธืจื˜ืคืขืœ ืคื•ืŸ ืึธืคืคืขืจืก ืคึฟืึทืจ ื™ื ื˜ืึทื’ืจื™ื™ืฉืึทืŸ ืื™ืŸ ืคึผืจืึธื•ื’ืจืึทืžืึทื‘ืึทืœ ืžืึทื˜ืจื™ืฅ (FPGA ืึธื“ืขืจ, ืื™ืŸ ืจื•ืกื™ืฉ, FPGA). ืขืก ืึทืœืข ืกื˜ืึทืจื˜ืขื“ ื›ึผืžืขื˜ ืฆืขืŸ ื™ืึธืจ ืฆื•ืจื™ืง, ืึธื‘ืขืจ ื™ื ื˜ืขืœ ืื™ื– ืืจื™ื™ืŸ ืื™ืŸ ืึท ืึทื’ืจืขืกื™ื•ื• ื‘ื™ื ืข ืื™ืŸ 2016 ื ืึธืš ืึทืงื•ื•ื™ื™ืจื™ื ื’ ืื™ื™ื ืขืจ ืคื•ืŸ ื“ื™ ื’ืจืขืกื˜ืขืจ FPGA ื“ืขื•ื•ืขืœืึธืคึผืขืจืก, Altera. ื”ื™ื™ึทื ื˜, ืžืึทื˜ืจื™ืฅ ื–ืขื ืขืŸ ื‘ืื˜ืจืื›ื˜ ื“ื•ืจืš ื™ื ื˜ืขืœ ื•ื•ื™ ืึท ื™ื ื˜ืึทื’ืจืึทืœ ื˜ื™ื™ืœ "ื“ืึทื˜ืŸ-ืกืขื ื˜ืจื™ืง" ืฉืœื•ื. ืื•ื™ื‘ ืžื™ืจ ื ืขืžืขืŸ ื™ื—ื™ื“ ืึทืจืขืึทืก ืคื•ืŸ ืึทืคึผืœืึทืงื™ื™ืฉืึทืŸ, FPGAs ื”ืขืœืคึฟืŸ ืฆื• ื‘ืื˜ื™ื™ื˜ื™ืง ืคืึทืจื’ื™ื›ืขืจืŸ ื“ื™ ืคึผืจืึทืกืขืกื™ื ื’ ืคื•ืŸ ื•ื•ื™ื“ืขื ืกื˜ืจื™ืžื–, ื ื™ื˜ ื‘ืœื•ื™ื– ื™ืžืคึผืจื•ื•ื•ื™ื ื’ ื‘ื™ืœื“ ืงื•ื•ืึทืœื™ื˜ืขื˜, ืึธื‘ืขืจ ืื•ื™ืš ืึทื ืึทืœื™ื™ื–ื™ื ื’ ื“ื™ ื‘ื™ืœื“ ืื•ืŸ ืืคื™ืœื• ืžืึทื›ืŸ ื“ื™ืกื™ื–ืฉืึทื ื– ื‘ืื–ื™ืจื˜ ืื•ื™ืฃ ื•ื•ืึธืก ื–ื™ื™ ื–ืขืŸ. ืื•ืŸ ื“ืึธืก ืื™ื– ืžืึทืฉื™ืŸ ืœืขืจื ืขืŸ ืื•ืŸ ืขืœืขืžืขื ื˜ืŸ ืคื•ืŸ ืงื™ื ืกื˜ืœืขืš ืกื™ื™ื›ืœ.

ื™ื ื˜ืขืœ ื’ืขืงื•ื™ืคื˜ ืึท ื‘ืจื™ื˜ื™ืฉ ืžื•ืžื›ืข ืื™ืŸ ื•ื•ื™ื“ืขื ืงืึธืจืขืก, AI ืื•ืŸ ML ืคึฟืึทืจ FPGAs

ื™ื ื˜ืขืœ ื”ืื˜ ืฉื•ื™ืŸ ืคื™ืœืข ืึทืงื•ื•ืึทื–ื™ืฉืึทื ื– ืฆื• ื™ื ืกื˜ืจื•ืžืขื ื˜ ืงืึธืžืคึผื™ื•ื˜ืขืจ ื–ืขืื•ื ื’, ืžืึทืฉื™ืŸ ืœืขืจื ืขืŸ ืื•ืŸ ื•ื•ื™ื“ืขื ืกื˜ืจื™ื ืคึผืจืึทืกืขืกื™ื ื’. ื ื ื™ื™ึทืข ืงื•ื™ืคืŸ ืื™ืŸ ื“ืขื ื’ืขื’ื ื˜ ืื™ื– ื’ืขื•ื•ืขืŸ ื“ื™ ืึทืงื•ื•ืึทื–ื™ืฉืึทืŸ ืคื•ืŸ ื“ื™ ื‘ืจื™ื˜ื™ืฉ ืคื™ืจืžืข ืึธืžื ื™ื˜ืขืง. ืขืก ืื™ื– ื˜ืฉื™ืงืึทื•ื•ืข ืฆื• ื˜ืึธืŸ ืึทื– ืึธืžื ื™ื˜ืขืง ื”ืื˜ ืฉื•ื™ืŸ ื“ืขื•ื•ืขืœืึธืคึผื™ื ื’ ื•ื•ื™ื“ืขื ืงืึธืจืขืก ืื•ืŸ ื•ื•ื™ื“ืขื ื“ืกืคึผ ืคึฟืึทืจ ื™ื ื˜ืขืœ ืก ื“ื™ืจืขืงื˜ ืงืึธื ืงื•ืจืขื ื˜ (ืึทืœื˜ืขืจืึท), Xilinx, ืคึฟืึทืจ ืคื™ืœืข ื™ืึธืจืŸ. Omnitek ืื™ืฆื˜ ื•ื•ืขืจื˜ ืึท ื˜ื™ื™ืœ ืคื•ืŸ ื“ื™ Intel ืคึผืจืึธื’ืจืึทืžืžืึทื‘ืœืข ืกืึทืœื•ืฉืึทื ื– ื’ืจื•ืคืข. ืื™ืŸ ื“ืขืจ ื–ืขืœื‘ื™ืงืขืจ ืฆื™ื™ื˜, ืึธืžื ื™ื˜ืขืง ืก ืžืึทื ืฉืึทืคึฟื˜ ืคื•ืŸ 40 ืขื ื“ื–ืฉืึทื ื™ืจื– ื•ื•ืขื˜ ืคืึธืจื–ืขืฆืŸ ืฆื• ื–ื™ื™ืŸ ื‘ืื–ื™ืจื˜ ืื™ืŸ ืขื ื’ืœืึทื ื“ ืื™ืŸ ื–ื™ื™ืŸ ืขืจืฉื˜ืข ืึธืคื™ืก. ื“ื™ ืคื™ืจืžืข ื˜ื•ื˜ ื ื™ืฉื˜ ื‘ืึทืจื™ื›ื˜ ื“ื™ ืกื•ืžืข ืคื•ืŸ โ€‹โ€‹ื“ื™ ื˜ืจืึทื ืกืึทืงื˜ื™ืึธืŸ, ื•ื•ืึธืก, ืื™ืŸ ืึทืœื’ืขืžื™ื™ืŸ, ืื™ื– ื–ื™ื™ึทืŸ ืคื™ืจ.

ื™ื ื˜ืขืœ ื’ืขืงื•ื™ืคื˜ ืึท ื‘ืจื™ื˜ื™ืฉ ืžื•ืžื›ืข ืื™ืŸ ื•ื•ื™ื“ืขื ืงืึธืจืขืก, AI ืื•ืŸ ML ืคึฟืึทืจ FPGAs

ืึธืžื ื™ื˜ืขืง ื”ืื˜ ืื™ื‘ืขืจ 220 IP ืงืึธืจืขืก, ื•ื•ืึธืก ืงืขื ืขืŸ ื‘ืื˜ื™ื™ื˜ื™ืง ื™ืงืกืคึผืึทื ื“ ื“ื™ ืงื™ื™ื˜ ืคื•ืŸ Intel FPGA ืึธืคืจื™ื ื’ื–. ื“ืขืจ ืคืึทื‘ืจื™ืงืึทื ื˜ ืื•ืŸ ื–ื™ื™ืŸ ืคึผืึทืจื˜ื ืขืจืก ื”ืึธื‘ืŸ ื“ื™ ื’ืขืœืขื’ื ื”ื™ื™ื˜ ืฆื• ืฉืึทืคึฟืŸ ืคึผืจืึธื•ื’ืจืึทืžืึทื‘ืึทืœ ืกืึทืœื•ืฉืึทื ื– ืฆื• ืึทืคึผื˜ืึทืžื™ื™ื– ื“ื™ ืžืึทืกืข ืื™ืŸ ืึท ื‘ืจื™ื™ื˜ ืงื™ื™ื˜. ื“ืึธืก ืื™ื– ื“ื™ ืึทืงืกืขืœืขืจื™ื™ืฉืึทืŸ ืคื•ืŸ ืึทื•ื“ื™ืึธ ื•ื•ื™ืกื•ืึทืœ ืกื˜ืจื™ืžื–, ื™ื ืึทื’ืจื™ื™ืฉืึทืŸ ืื™ืŸ ืคึผืจื•ื™ืขืงืฆื™ืข ื™ื ืกื˜ืึทืœื™ื™ืฉืึทื ื–, ืžืขื“ื™ืฆื™ื ื™ืฉ, ืžื™ืœื™ื˜ืขืจื™ืฉ ืื•ืŸ ืื ื“ืขืจืข ื“ืขื•ื•ื™ืกืขืก, ืึทืจื™ื™ึทื ื’ืขืจืขื›ื ื˜ ื•ื•ื™ื“ืขื ืกืขืจื•ื•ื™ื™ืœืึทื ืก ืื•ืŸ ื‘ืจืึธื“ืงืึทืกื˜ื™ื ื’. ืืŸ ืื ื“ืขืจ ื•ื•ื™ื›ื˜ื™ืง ื˜ื™ื™ืœ ืคื•ืŸ Omnitek ืก ืึทืงื˜ื™ื•ื•ื™ื˜ืขื˜ืŸ ืื™ื– ื“ื™ ืคื™ืจืžืข 'ืก ืึทื ื˜ื•ื•ื™ืงืœื•ื ื’ ืคื•ืŸ DSP ืงืึธืจืขืก ืฆื• ืคืึทืจื’ื™ื›ืขืจืŸ ืžืึทืฉื™ืŸ ืœืขืจื ืขืŸ (ื ืขื•ืจืึทืœ ื ืขื˜ื•ื•ืึธืจืงืก) ืื•ืŸ ืึทื™ ืื™ืŸ ื‘ืึทืฉืœื•ืก-ืžืื›ืŸ. ืขืก ืงืขื ืขืŸ ื–ื™ื™ืŸ ื“ืขืจื•ื•ืึทืจื˜ ืึทื– ื™ื ื˜ืขืœ ื’ืขืžืื›ื˜ ื“ื™ ืจืขื›ื˜ ืื•ืŸ ื‘ื™ื™ึทืฆื™ื™ึทื˜ื™ืง ืึทืงื•ื•ืึทื–ื™ืฉืึทืŸ.



ืžืงื•ืจ: 3dnews.ru

ืœื™ื™ื’ืŸ ืึท ื‘ืึทืžืขืจืงื•ื ื’