ProHoster > Pūnaewele > nūhou pūnaewele > Open Source FPGA Initiative

Open Source FPGA Initiative

Ua hoʻolaha ʻia ka hoʻokumu ʻana o kahi hui waiwai ʻole hou, ʻo ka Open-Source FPGA Foundation (OSFPGA), i manaʻo ʻia e hoʻomohala, hoʻolaha a hoʻokumu i kahi kaiapuni no ka hoʻomohala ʻana o nā hāmeʻa hāmama a me nā polokalamu lako polokalamu e pili ana i ka hoʻohana ʻana i ka papa hana programmable gate array ( FPGA) nā kaapuni i hoʻohui ʻia e ʻae i ka hana loiloi reprogrammable ma hope o ka hana ʻana i ka chip. Hoʻokō ʻia nā hana binary koʻikoʻi (AND, NAND, OR, NOR a me XOR) i loko o ia mau ʻāpana me ka hoʻohana ʻana i nā puka logic (nā hoʻololi) i loaʻa nā hoʻokomo he nui a me hoʻokahi puka, ʻo ka hoʻonohonoho ʻana o nā pilina ma waena e hiki ke hoʻololi ʻia e nā polokalamu.

Loaʻa i nā lālā hoʻokumu o OSFPGA kekahi mau mea noiʻi ʻenehana FPGA kaulana mai nā hui a me nā papahana e like me EPFL, QuickLogic, Zero ASIC, a me GSG Group. Ma lalo o ka mana o ka hui hou, e hoʻomohala ʻia kahi pūʻulu o nā mea hana hāmama a manuahi no ka prototyping wikiwiki e pili ana i nā chips FPGA a me ke kākoʻo no ka automation design electronic (EDA). E mālama pū ka hui i ka hoʻomohala hui ʻana o nā kūlana wehe e pili ana i nā FPGA, e hāʻawi ana i kahi hui kūʻokoʻa no nā hui e kaʻana like i nā ʻike a me nā ʻenehana.

Manaʻo ʻia e hiki i ka OSFPGA ke hiki i nā hui chip ke hoʻopau i kekahi o nā kaʻina hana ʻenekinia e pili ana i ka hana ʻana i nā FPGA, hāʻawi i nā mea hoʻohana hope me kahi lako lako polokalamu FPGA maʻamau, a hiki i ka hui pū ʻana ke hana i nā hale kiʻekiʻe kiʻekiʻe. Hoʻomaopopoʻia e mālamaʻia nā mea hana hāmama i hāʻawiʻia e OSFPGA i ke kūlana kiʻekiʻe o ka maikaʻi, hālāwai aʻoi aku paha i nā kūlana o kaʻoihana.

ʻO nā pahuhopu nui o ka Open-Source FPGA Foundation:

  • Hāʻawi i nā kumuwaiwai a me nā ʻenehana e hoʻomohala i kahi pūʻulu o nā mea hana e pili ana i ka lako a me ka lako polokalamu FPGA.
  • Hoʻolaha i ka hoʻohana ʻana i kēia mau mea hana ma o nā hanana like ʻole.
  • Hāʻawi i ke kākoʻo, ka hoʻomohala ʻana a me ka wehe ʻana i nā mea hana no ka noiʻi ʻana i nā hale kiʻi kiʻekiʻe FPGA, a me nā lako polokalamu a me nā lako hana e pili ana.
  • Ka mālama ʻana i kahi papa inoa o nā hale hoʻolālā FPGA i loaʻa i ka lehulehu, nā ʻenehana hoʻolālā, a me nā hoʻolālā papa i loaʻa mai nā puke a me nā hōʻike patent i pau.
  • E hoʻomākaukau a hāʻawi i ke komo i nā mea hoʻomaʻamaʻa e kōkua i ke kūkulu ʻana i kahi kaiāulu o nā mea hoʻomohala hoihoi.
  • E hoʻomaʻamaʻa i ka hui pū ʻana me nā mea hana chip e hōʻemi i ke kumukūʻai a me ka manawa e hoʻāʻo ai a hōʻoia i nā hale kiʻi FPGA hou a me nā lako.

Nā mea paahana open source pili:

  • ʻO OpenFPGA kahi pahu Electronic Design Automation (EDA) no nā FPGA e kākoʻo ana i ka hoʻokumu ʻana i nā lako ma muli o nā wehewehe Verilog.
  • ʻO ka 1st CLaaS kahi hoʻolālā e hiki ai iā ʻoe ke hoʻohana i nā FPGA e hana i nā mea hoʻolalelale lako no ka pūnaewele a me nā noi ao.
  • ʻO Verilog-to-Routing (VTR) kahi mea hana e hiki ai iā ʻoe ke hana i ka hoʻonohonoho o ka FPGA i koho ʻia ma muli o ka wehewehe ʻana ma ka ʻōlelo Verilog.
  • He mea hana ʻo Symbiflow no ka hoʻomohala ʻana i nā hoʻonā e pili ana i ka Xilinx 7, Lattice iCE40, Lattice ECP5 a me QuickLogic EOS S3 FPGAs.
  • ʻO Yosys kahi Verilog RTL synthesis framework no nā noi maʻamau.
  • ʻO EPFL kahi hōʻiliʻili o nā hale waihona puke no ka hoʻomohala ʻana i nā noi synthesis logic.
  • He mea hoʻohui ʻia ʻo LSOracle i nā hale waihona puke EPFL no ka hoʻonui ʻana i nā hopena synthesis logic.
  • ʻO Edalize kahi mea hana Python no ka launa pū ʻana me nā ʻōnaehana hoʻolālā uila (EDA) a me ka hana ʻana i nā faila papahana no lākou.
  • He mea hōʻuluʻulu, mea hōʻike, simulator, a me synthesizer no ka ʻōlelo wehewehe ʻenehana VHDL.
  • He polokalamu ʻo VerilogCreator no QtCreator nāna e hoʻololi i kēia noi i wahi hoʻomohala ma Verilog 2005.
  • ʻO FuseSoC kahi luna pūʻolo no ka HDL (Hardware Description Language) code a me ka hui abstraction utility no FPGA/ASIC.
  • ʻO SOFA (Skywater Open-source FPGA) he pūʻulu o ka FPGA IP (Intellectual Property) i hana ʻia me ka Skywater PDK a me ka OpenFPGA framework.
  • ʻO openFPGALoader kahi mea pono no ka hoʻolālā ʻana i nā FPGA.
  • LiteDRAM - ka IP maʻamau no FPGA me ka hoʻokō DRAM.

Eia hou, hiki iā mākou ke hoʻomaopopo i ka papahana Main_MiSTer, kahi e hiki ai ke hoʻohana i ka papa DE10-Nano FPGA i hoʻopili ʻia i kahi TV a i ʻole ka nānā ʻana e hoʻohālikelike i nā mea hana o nā ʻoliʻoli pāʻani kahiko a me nā kamepiula maʻamau. ʻAʻole like me nā emulators holo, me ka hoʻohana ʻana i kahi FPGA e hiki ai ke hana hou i ke kaiapuni ʻenehana mua kahi e hiki ai iā ʻoe ke holo i nā kiʻi ʻōnaehana i loaʻa a me nā noi no nā paepae lako kahiko.

Source: opennet.ru

Pākuʻi i ka manaʻo hoʻopuka