Ua hoʻolaha ʻia ka hoʻokumu ʻia ʻana o ka Open-Source FPGA Foundation (OSFPGA), kahi hui waiwai ʻole hou. ʻO kāna huakaʻi ka hoʻomohala ʻana, hoʻolaha, a hoʻokumu i kahi kaiapuni no ka hoʻomohala ʻana o nā hāmeʻa hāmama a me nā hāmeʻa lako polokalamu me ka hoʻohana ʻana i ka FPGA (field-programmable gate array) integrated circuits (FPGAs), e ʻae ai i ka reprogramming o ka loiloi ma hope o ka hana chip. Hoʻokō ʻia nā hana binary koʻikoʻi (AND, NAND, OR, NOR, a me XOR) i kēia mau chips me ka hoʻohana ʻana i nā puka logic (switch) me nā mea hoʻokomo he nui a me kahi puka hoʻokahi, hiki ke hoʻonohonoho hou ʻia nā pilina ma waena o ka hoʻohana ʻana i ka polokalamu.
ʻO nā lālā i hoʻokumu i ka hui OSFPGA he mau mea noiʻi kaulana i nā ʻenehana pili i ka FPGA, e hōʻike ana i nā hui a me nā papahana e like me EPFL, QuickLogic, Zero ASIC, a me GSG Group. Ma lalo o ka mana o ka hui hou, e hoʻomohala ʻia kahi pūʻulu o nā mea hana hāmama a manuahi no ka prototyping wikiwiki e pili ana i nā chips FPGA a me ke kākoʻo no nā mea hana uila hoʻolālā uila (EDA). E mālama pū ka hui i ka hoʻomohala ʻana o nā kūlana pili i ka FPGA wehe, e hāʻawi ana i kahi kahua kūʻokoʻa no nā hui e hoʻololi i ka ʻike a me nā ʻenehana.
Manaʻo ʻia nā hana a OSFPGA e hoʻopau i kekahi mau kaʻina hana ʻenekinia i ka hana FPGA no nā mea hana chip, e hāʻawi i nā mea hoʻohana hope me kahi lako polokalamu FPGA mākaukau hoʻohana, hiki ke hoʻopili ʻia, a hoʻomaʻamaʻa i ka hui pū ʻana i ka hana ʻana i nā hale kiʻekiʻe kiʻekiʻe. E kākoʻo ʻia nā mea hana open source o OSFPGA e ka pae kiʻekiʻe o ka maikaʻi, hālāwai a ʻoi aku paha i nā kūlana ʻoihana.
ʻO nā pahuhopu nui o ka Open-Source FPGA Foundation:
- Hāʻawi i nā kumuwaiwai a me nā ʻenehana no ka hoʻomohala ʻana i kahi pūʻulu o nā mea hana e pili ana i ka lako a me ka lako polokalamu FPGA.
- Hoʻolaha i ka hoʻohana ʻana i kēia mau mea hana ma o nā hanana like ʻole.
- No ka hāʻawi ʻana i ke kākoʻo, hoʻomohala, a me ka wehe ʻana i nā mea hana no ka noiʻi ʻana i nā hoʻolālā FPGA kiʻekiʻe a me nā polokalamu pili a me nā hoʻomohala ʻenehana.
- E mālama i ka papa inoa o nā hale hoʻolālā FPGA i loaʻa i ka lehulehu, nā ʻenehana hoʻolālā, a me nā hoʻolālā papa i loaʻa mai nā paʻi i pau a me nā kikoʻī patent.
- Ka hoʻomohala ʻana a me ka hāʻawi ʻana i nā mea hoʻomaʻamaʻa e kōkua i ke kūkulu ʻana i kahi kaiāulu o nā mea hoʻomohala hoihoi.
- E hoʻomaʻalahi i ka laulima ʻana me nā mea hana ʻāpana e hōʻemi i ke kumukūʻai a me ka manawa e hoʻāʻo a hōʻoia i nā hoʻolālā FPGA hou a me nā lako.
Nā mea paahana open source pili:
- ʻO OpenFPGA kahi mea hana uila uila (EDA) no nā FPGA e kākoʻo ana i ka hana hoʻolālā e pili ana i nā wehewehe Verilog.
- ʻO ka 1st CLaaS kahi hoʻolālā e hiki ai i ka hoʻohana ʻana i nā FPGA e hana i nā mea hoʻoikaika kino no ka pūnaewele a me nā noi ao.
- ʻO Verilog-to-Routing (VTR) kahi mea hana e hiki ai iā ʻoe ke hana i kahi hoʻonohonoho no kahi FPGA i koho ʻia ma muli o kahi wehewehe Verilog.
- ʻO Symbiflow kahi mea hana hoʻomohala no Xilinx 7, Lattice iCE40, Lattice ECP5, a me QuickLogic EOS S3 FPGAs.
- ʻO Yosys kahi Verilog RTL synthesis framework no nā noi maʻamau.
- ʻO EPFL kahi hōʻiliʻili o nā hale waihona puke no ka hoʻomohala ʻana i nā noi synthesis logic.
- He mea hoʻohui ʻia ʻo LSOracle i nā hale waihona puke EPFL no ka hoʻonui ʻana i nā hopena synthesis logic.
- ʻO Edalize kahi mea hana Python no ka launa pū ʻana me nā ʻōnaehana hoʻolālā uila (EDA) a me ka hana ʻana i nā faila hoʻolālā no lākou.
- He mea hōʻuluʻulu, mea anaana, simulator, a me ka synthesizer no ka ʻōlelo wehewehe ʻenehana VHDL.
- He polokalamu ʻo VerilogCreator no QtCreator e hoʻololi i kēia noi i wahi hoʻomohala no ka ʻōlelo Verilog 2005.
- ʻO FuseSoC kahi luna hoʻokele pūʻolo no ke code HDL (Hardware Description Language) a me kahi pono hana hoʻākāka ʻākoakoa FPGA/ASIC.
- ʻO SOFA (Skywater Open-source FPGA) he pūʻulu o FPGA IP (Intellectual Property) i kūkulu ʻia me ka Skywater PDK a me ka OpenFPGA framework.
- ʻO openFPGALoader kahi mea pono no ka hoʻolālā ʻana i nā FPGA.
- ʻO LiteDRAM kahi IP Core maʻamau no nā FPGA me ka hoʻokō DRAM.
ʻO kekahi papahana ʻē aʻe e pono e haʻi ʻia ʻo ia ka papahana Main_MiSTer, e hoʻohana ana i kahi papa DE10-Nano FPGA i hoʻopili ʻia i kahi TV a i ʻole kiaʻi e hoʻohālikelike i ka lako o nā console pāʻani kahiko a me nā kamepiula maʻamau. ʻAʻole like me nā emulators holo, me ka hoʻohana ʻana i kahi FPGA e ʻae ai i ka leʻaleʻa o ka ʻenehana ponoʻī maoli, e ʻae ai i ka hoʻokō ʻana i nā kiʻi ʻōnaehana i loaʻa a me nā noi no nā paepae lako kahiko.
Source: opennet.ru
